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path: root/arch/arm/plat-mxc/gpio.c
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2011-07-21Revert "Merge remote-tracking branch 'arm-soc/for-next' into linaro-3.0"Nicolas Pitre
This reverts commit c7e0c8535d73f8c5bf760926a2bd71c9840cf2ef, reversing changes made to dfee09c8acf18e84fe197bb5d821d1e4e02d020f. John Stultz reports that Panda doesn't boot anymore and 'git bisect' indicated the merge commit itself as the culprit. The resulting kernel log is: [ 1.734802] OMAP DSS rev 4.0 [ 1.740417] omap_hwmod: dss_core: _wait_target_disable failed [ 1.746429] omap_device: omapdss_dss.-1: new worst case deactivate latency 01 [ 1.755035] omapdss DISPC error: can't get dss_clk [ 1.760101] omapdss_dispc: probe of omapdss_dispc failed with error -2 [ 1.767333] omapdss HDMI error: can't get hdmi_clk [ 1.772399] omapdss_hdmi: probe of omapdss_hdmi failed with error -2 [ 1.780273] ------------[ cut here ]------------ [ 1.785125] WARNING: at drivers/video/omap2/dss/dispc.c:553dispc_runtime_ge) [ 1.793640] Modules linked in: [ 1.796905] ---[ end trace 6fcb132ac310d004 ]--- [ 1.801757] Unable to handle kernel NULL pointer dereference at virtualaddr0 [...] Revert it so a later version of the arm-soc merge result can be used instead.
2011-06-06gpio/mxc: Move Freescale MXC gpio driver to drivers/gpioShawn Guo
GPIO drivers are getting moved to drivers/gpio for cleanup and consolidation. This patch moves the plat-mxc driver. Follow up patches will clean it up and make it a fine upstanding gpio driver. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-04-12ARM: mxc: Add missing lockdep annotationThomas Gleixner
The irq_set_wake() function of the gpio irq_chip calls enable/disable_irq_wake() on the demultiplex interrupt. That leads to a lockdep warning "INFO: possible recursive locking detected" because irq_set_type() is called under irq_desc->lock and the *_irq_wake() calls take irq_desc->lock of the demux interrupt. Tell lockdep that the gpio irqs are in a different lock class. Documentation/SubmitChecklist: 15: All codepaths have been exercised with all lockdep features enabled. That's a non-optional requirement, AFAICT. Reported-and-tested-by: Arnaud Patard <arnaud.patard@rtp-net.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> LAKML-Reference: alpine.LFD.2.00.1104041416290.19945@localhost6.localdomain6 Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2011-03-29arm: Fold irq_set_chip/irq_set_handlerThomas Gleixner
Use irq_set_chip_and_handler() instead. Converted with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-29arm: Cleanup the irq namespaceThomas Gleixner
Convert to the new function names. Automated with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-07ARM i.MX: Move gpio initialization to SoC specific filesSascha Hauer
This saves us from soc level dispatching in generic files Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2011-02-01plat-mxc: Provide irq_chip name for GPIO IRQsAlexander Stein
Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2011-01-13ARM: plat-mxc: irq_data conversion.Lennert Buytenhek
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
2011-01-03arm: mx50: add core functions support except clockRichard Zhao
Add core definitions and memory map, gpio, irq, iomux, uart device support. Signed-off-by: Richard Zhao <richard.zhao@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2011-01-03arm: plat-mxc: add full parameter macro to define gpio portRichard Zhao
Signed-off-by: Richard Zhao <richard.zhao@freescale.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-11-19ARM: mx3: introduce SOC_IMX31 and SOC_IMX35Uwe Kleine-König
Additionally convert some known to be good usages to the new names. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-11-19ARM: mx3: move registration of gpios to plat-mxc/gpio.cUwe Kleine-König
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-11-19ARM: imx: use SOC_IMX25 instead of ARCH_MX25 for multi-SoCUwe Kleine-König
Some usages of ARCH_MX25 are assuming that if it is defined the other SoCs are undefined. Use SOC_IMX25 for the save places. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-11-17ARM: mx25: move registration of gpios to plat-mxc/gpio.cUwe Kleine-König
To use common macros to define the gpio ports for imx{1,21,25,27} the existing ones had to made more general and a few more base address defines were necessary. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-11-17ARM: imx: move registration of gpios to plat-mxc/gpio.cUwe Kleine-König
This finally gets rid of mach-imx/devices.c. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-11-17ARM: imx/gpio: remove some useless castsUwe Kleine-König
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-10-26ARM: imx: Add wake functionality to GPIODinh Nguyen
Add function definition for irq_chip.set_wake to enable GPIO to wake-up the system. This patch has been tested on a MX51 Babbage system that had suspend code implemented. The set_wake implementation is necessary for a GPIO to wake up a system from suspend. Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-10-11mxc/gpio: make _set_value work with values != 0/1Peter Korsgaard
Documentation/gpio.txt specifies that the value argument to gpio_set_value() should be handled as a boolean (E.G. != 0 is high), so use the same logic as in _set_direction(). Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-07-28arm/imx/gpio: add spinlock protectionBaruch Siach
The GPIO registers need protection from concurrent access for operations that are not atomic. Cc: stable@kernel.org Cc: Juergen Beisert <j.beisert@pengutronix.de> Cc: Daniel Mack <daniel@caiaq.de> Reported-by: rpkamiak@rockwellcollins.com Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-07-26i.MX51: handle IRQ for gpio 16..31Eric Bénard
The i.MX51 generates 2 IRQ for each GPIO bank : one for gpio 0 to 15 and one for gpio 16 to 31. Actually only the lower IRQ is registered so register the second one. Signed-off-by: Eric Bénard <eric@eukrea.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-04-22mx5: Add registration of GPIOs for MX5 devicesDinh Nguyen
Register the gpio irqs on Freescale's MX51 Babbage HW. Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com> Signed-off-by: Amit Kucheria <amit.kucheria@canonical.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-02-24arm/imx/gpio: remove a BUG_ON in hot pathUwe Kleine-König
Now if the problem occurs that triggered the BUG_ON before, the machine runs in a NULL pointer dereference. So it wouldn't be much harder now to debug the situation if it occured. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-02-24arm/imx/gpio: use fls to find set bits in the irq status registerUwe Kleine-König
As in most cases only few irqs are pending using fls is more effective than looping over all bits. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-02-24arm/imx: use generic_handle_irq instead of open-coding itUwe Kleine-König
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-02-24arm/imx/gpio: GPIO_INT_{HIGH,LOW}_LEV are not necessarily constantUwe Kleine-König
GPIO_INT_LOW_LEV is defined as (cpu_is_mx1_mx2() ? 0x3 : 0x0) so depending on compiler optimisation and enabled SoCs this doesn't qualify as a constant expression as needed by a switch statement. Ditto for GPIO_INT_HIGH_LEV. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2009-11-14imx/gpio: Use handle_level_irqUwe Kleine-König
According to Russell King handle_edge_irq is only useful for "edge-based inputs where the controller does not remember transitions with the input masked." So using handle_edge_irq unconditionally for both edge and level irqs is wrong. Testing showed that the controller does remember transitions while the interrupt is masked. So use handle_level_irq unconditionally. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-08-14Add i.MX25 supportSascha Hauer
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-08-07MXC gpio interrupt support: move register definitions to .c fileSascha Hauer
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-08-07mxc gpio: CONFIG_ARCH_* -> cpu_is_*()Sascha Hauer
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-05-07mxc: emulate GPIO interrupt on both-edgesGuennadi Liakhovetski
MXC GPIO controller does not support generation of interrupts on both edges. Emulate this mode in software by reconfiguring the irq trigger polarity on each interrupt. This follows an example of drivers/mfd/asic3.c. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-05-05MXC: remove BUG_ON in interrupt handlerSascha Hauer
On i.MX31 I sometimes get spurious interrupts. There is no need to crash the whole system when this happens. Instead, silently ignore it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-03-13mxc: first set GPIO level, then switch direction to outputGuennadi Liakhovetski
Make sure not to create spurious pulses on GPIOs, when configuring them as output: first set required level, then switch direction. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2008-12-16patch-mxc-add-ARCH_MX1Paulius Zaleckas
Adds MX1 architecture to platform MXC. It will supersede mach-imx and let it die. Signed-off-by: Paulius Zaleckas <paulius.zaleckas@teltonika.lt> Signed-off-by: Darius Augulis <augulis.darius@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2008-10-30[ARM] MXC: Fix mxc_gpio_get(), which must read PSR register instead DR.Darius Augulis
The Data register holds the value we have written to a gpio. To get the input value we must read the Pad Status Register MX3 (or Sample Status register in MX1/2 terms) Signed-off-by: Darius Augulis <augulis.darius@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2008-08-07[ARM] Move include/asm-arm/arch-* to arch/arm/*/include/machRussell King
This just leaves include/asm-arm/plat-* to deal with. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-08-07[ARM] Remove asm/hardware.h, use asm/arch/hardware.h insteadRussell King
Remove includes of asm/hardware.h in addition to asm/arch/hardware.h. Then, since asm/hardware.h only exists to include asm/arch/hardware.h, update everything to directly include asm/arch/hardware.h and remove asm/hardware.h. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-27[ARM] 5179/1: Replace obsolete IRQT_* and __IRQT_* values with IRQ_TYPE_*Dmitry Baryshkov
IRQT_* and __IRQT_* were obsoleted long ago by patch [3692/1]. Remove them completely. Sed script for the reference: s/__IRQT_RISEDGE/IRQ_TYPE_EDGE_RISING/g s/__IRQT_FALEDGE/IRQ_TYPE_EDGE_FALLING/g s/__IRQT_LOWLVL/IRQ_TYPE_LEVEL_LOW/g s/__IRQT_HIGHLVL/IRQ_TYPE_LEVEL_HIGH/g s/IRQT_RISING/IRQ_TYPE_EDGE_RISING/g s/IRQT_FALLING/IRQ_TYPE_EDGE_FALLING/g s/IRQT_BOTHEDGE/IRQ_TYPE_EDGE_BOTH/g s/IRQT_LOW/IRQ_TYPE_LEVEL_LOW/g s/IRQT_HIGH/IRQ_TYPE_LEVEL_HIGH/g s/IRQT_PROBE/IRQ_TYPE_PROBE/g s/IRQT_NOEDGE/IRQ_TYPE_NONE/g Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-07-05MXC arch: Add gpio support for the whole platformJuergen Beisert
This patch bases on the one from Daniel Mack. The most important change to Daniel's patch is to be more generic. This gpio routine supports at least the i.MX27 and i.MX31 processors. Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de> Acked-by: Daniel Mack <daniel@caiaq.de>
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