diff options
author | Haavard Skinnemoen <haavard.skinnemoen@atmel.com> | 2008-12-17 16:53:07 +0100 |
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committer | Haavard Skinnemoen <haavard.skinnemoen@atmel.com> | 2008-12-17 16:53:07 +0100 |
commit | cb5473205206c7f14cbb1e747f28ec75b48826e2 (patch) | |
tree | 8f4808d60917100b18a10b05230f7638a0a9bbcc /board/uc100/uc100.c | |
parent | baf449fc5ff96f071bb0e3789fd3265f6d4fd9a0 (diff) | |
parent | 92c78a3bbcb2ce508b4bf1c4a1e0940406a024bb (diff) |
Merge branch 'fixes' into cleanups
Conflicts:
board/atmel/atngw100/atngw100.c
board/atmel/atstk1000/atstk1000.c
cpu/at32ap/at32ap700x/gpio.c
include/asm-avr32/arch-at32ap700x/clk.h
include/configs/atngw100.h
include/configs/atstk1002.h
include/configs/atstk1003.h
include/configs/atstk1004.h
include/configs/atstk1006.h
include/configs/favr-32-ezkit.h
include/configs/hammerhead.h
include/configs/mimc200.h
Diffstat (limited to 'board/uc100/uc100.c')
-rw-r--r-- | board/uc100/uc100.c | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/board/uc100/uc100.c b/board/uc100/uc100.c index 896f9693e..38c7be6ba 100644 --- a/board/uc100/uc100.c +++ b/board/uc100/uc100.c @@ -138,7 +138,7 @@ int board_switch(void) { volatile pcmconf8xx_t *pcmp; - pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia)); + pcmp = (pcmconf8xx_t *)(&(((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia)); return ((pcmp->pcmc_pipr >> 24) & 0xf); } @@ -171,7 +171,7 @@ int checkboard (void) */ phys_size_t initdram (int board_type) { - volatile immap_t *immap = (immap_t *) CFG_IMMR; + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; /*---------------------------------------------------------------------*/ @@ -187,8 +187,8 @@ phys_size_t initdram (int board_type) /*---------------------------------------------------------------------*/ memctl->memc_mptpr = 0x0200; /* Divide by 32 WV */ - memctl->memc_mamr = CFG_MAMR_VAL & 0xFF7FFFFF; /* Bit 8 := "0" Kein Refresh WV */ - memctl->memc_mbmr = CFG_MBMR_VAL; + memctl->memc_mamr = CONFIG_SYS_MAMR_VAL & 0xFF7FFFFF; /* Bit 8 := "0" Kein Refresh WV */ + memctl->memc_mbmr = CONFIG_SYS_MBMR_VAL; /*---------------------------------------------------------------------*/ /* Initialize the Memory Controller registers, MPTPR, Chip Select 1 */ @@ -198,8 +198,8 @@ phys_size_t initdram (int board_type) /* clock rate (16.67MHz) to allow proper operation for all ADS */ /* clock frequencies. */ /*---------------------------------------------------------------------*/ - memctl->memc_or1 = CFG_OR1_PRELIM; - memctl->memc_br1 = CFG_BR1_PRELIM; + memctl->memc_or1 = CONFIG_SYS_OR1_PRELIM; + memctl->memc_br1 = CONFIG_SYS_BR1_PRELIM; /*-------------------------------------------------------------------*/ /* Wait at least 200 usec for DRAM to stabilize, this magic number */ @@ -209,8 +209,8 @@ phys_size_t initdram (int board_type) memctl->memc_mamr = (memctl->memc_mamr | 0x04) & ~0x08; - memctl->memc_br1 = CFG_BR1_PRELIM; - memctl->memc_or1 = CFG_OR1_PRELIM; + memctl->memc_br1 = CONFIG_SYS_BR1_PRELIM; + memctl->memc_or1 = CONFIG_SYS_OR1_PRELIM; /*---------------------------------------------------------------------*/ /* run MRS command in location 5-8 of UPMB. */ @@ -236,7 +236,7 @@ phys_size_t initdram (int board_type) /*---------------------------------------------------------------------*/ /* rerstore MBMR value (4-beat refresh burst.) */ /*---------------------------------------------------------------------*/ - memctl->memc_mamr = CFG_MAMR_VAL | 0x00800000; /* Bit 8 := "1" Refresh Enable WV */ + memctl->memc_mamr = CONFIG_SYS_MAMR_VAL | 0x00800000; /* Bit 8 := "1" Refresh Enable WV */ udelay(200); @@ -251,9 +251,9 @@ int misc_init_r (void) /* * Make sure that RTC has clock output enabled (triggers watchdog!) */ - val = i2c_reg_read (CFG_I2C_RTC_ADDR, 0x0D); + val = i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, 0x0D); val |= 0x80; - i2c_reg_write (CFG_I2C_RTC_ADDR, 0x0D, val); + i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, 0x0D, val); /* * Configure PHY to setup LED's correctly and use 100MBit, FD |