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authorPeter Tyser <ptyser@xes-inc.com>2009-09-21 11:20:32 -0500
committerWolfgang Denk <wd@denx.de>2009-10-03 10:17:56 +0200
commit6385b28116f775da4771b768ba9bf93c3aaaf26e (patch)
treeefe7ab43f4b4bef802604c2d845867b2a3b96e76 /drivers/fpga/virtex2.c
parentcd1011db80287eef933d1599b74cff1116c93134 (diff)
fpga: Remove relocation fixups
PPC boards are the only users of the current FPGA code which is littered with manual relocation fixups. Now that proper relocation is supported for PPC boards, remove FPGA manual relocation. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Diffstat (limited to 'drivers/fpga/virtex2.c')
-rw-r--r--drivers/fpga/virtex2.c118
1 files changed, 0 insertions, 118 deletions
diff --git a/drivers/fpga/virtex2.c b/drivers/fpga/virtex2.c
index 50d092184..d1b4d15b7 100644
--- a/drivers/fpga/virtex2.c
+++ b/drivers/fpga/virtex2.c
@@ -103,11 +103,9 @@
static int Virtex2_ssm_load (Xilinx_desc * desc, void *buf, size_t bsize);
static int Virtex2_ssm_dump (Xilinx_desc * desc, void *buf, size_t bsize);
-static int Virtex2_ssm_reloc (Xilinx_desc * desc, ulong reloc_offset);
static int Virtex2_ss_load (Xilinx_desc * desc, void *buf, size_t bsize);
static int Virtex2_ss_dump (Xilinx_desc * desc, void *buf, size_t bsize);
-static int Virtex2_ss_reloc (Xilinx_desc * desc, ulong reloc_offset);
int Virtex2_load (Xilinx_desc * desc, void *buf, size_t bsize)
{
@@ -158,31 +156,6 @@ int Virtex2_info (Xilinx_desc * desc)
return FPGA_SUCCESS;
}
-int Virtex2_reloc (Xilinx_desc * desc, ulong reloc_offset)
-{
- int ret_val = FPGA_FAIL;
-
- if (desc->family != Xilinx_Virtex2) {
- printf ("%s: Unsupported family type, %d\n",
- __FUNCTION__, desc->family);
- return FPGA_FAIL;
- } else
- switch (desc->iface) {
- case slave_serial:
- ret_val = Virtex2_ss_reloc (desc, reloc_offset);
- break;
-
- case slave_selectmap:
- ret_val = Virtex2_ssm_reloc (desc, reloc_offset);
- break;
-
- default:
- printf ("%s: Unsupported interface type, %d\n",
- __FUNCTION__, desc->iface);
- }
- return ret_val;
-}
-
/*
* Virtex-II Slave SelectMap configuration loader. Configuration via
* SelectMap is as follows:
@@ -448,81 +421,6 @@ static int Virtex2_ssm_dump (Xilinx_desc * desc, void *buf, size_t bsize)
return ret_val;
}
-/*
- * Relocate the addresses in the function table from FLASH (or ROM,
- * or whatever) to RAM.
- */
-static int Virtex2_ssm_reloc (Xilinx_desc * desc, ulong reloc_offset)
-{
- ulong addr;
- int ret_val = FPGA_FAIL;
- Xilinx_Virtex2_Slave_SelectMap_fns *fn_r, *fn =
- (Xilinx_Virtex2_Slave_SelectMap_fns *) (desc->iface_fns);
-
- if (fn) {
- /*
- * Get the relocated table address
- */
- addr = (ulong) fn + reloc_offset;
- fn_r = (Xilinx_Virtex2_Slave_SelectMap_fns *) addr;
-
- /*
- * Check to see if the table has already been relocated. If not, do
- * a sanity check to make sure there is a faithful copy of the
- * FLASH based function table in RAM, then adjust the table.
- */
- if (!fn_r->relocated) {
- if (memcmp
- (fn_r, fn, sizeof (Xilinx_Virtex2_Slave_SelectMap_fns))
- == 0) {
- desc->iface_fns = fn_r;
- } else {
- PRINTF ("%s:%d: Invalid function table at 0x%p\n",
- __FUNCTION__, __LINE__, fn_r);
- return FPGA_FAIL;
- }
-
- PRINTF ("%s:%d: Relocating descriptor at 0x%p\n",
- __FUNCTION__, __LINE__, desc);
-
- addr = (ulong) (fn->pre) + reloc_offset;
- fn_r->pre = (Xilinx_pre_fn) addr;
- addr = (ulong) (fn->pgm) + reloc_offset;
- fn_r->pgm = (Xilinx_pgm_fn) addr;
- addr = (ulong) (fn->init) + reloc_offset;
- fn_r->init = (Xilinx_init_fn) addr;
- addr = (ulong) (fn->done) + reloc_offset;
- fn_r->done = (Xilinx_done_fn) addr;
- addr = (ulong) (fn->err) + reloc_offset;
- fn_r->err = (Xilinx_err_fn) addr;
- addr = (ulong) (fn->clk) + reloc_offset;
- fn_r->clk = (Xilinx_clk_fn) addr;
- addr = (ulong) (fn->cs) + reloc_offset;
- fn_r->cs = (Xilinx_cs_fn) addr;
- addr = (ulong) (fn->wr) + reloc_offset;
- fn_r->wr = (Xilinx_wr_fn) addr;
- addr = (ulong) (fn->rdata) + reloc_offset;
- fn_r->rdata = (Xilinx_rdata_fn) addr;
- addr = (ulong) (fn->wdata) + reloc_offset;
- fn_r->wdata = (Xilinx_wdata_fn) addr;
- addr = (ulong) (fn->busy) + reloc_offset;
- fn_r->busy = (Xilinx_busy_fn) addr;
- addr = (ulong) (fn->abort) + reloc_offset;
- fn_r->abort = (Xilinx_abort_fn) addr;
- addr = (ulong) (fn->post) + reloc_offset;
- fn_r->post = (Xilinx_post_fn) addr;
- fn_r->relocated = TRUE;
- } else {
- printf ("%s:%d: Function table @0x%p has already been relocated\n", __FUNCTION__, __LINE__, fn_r);
- desc->iface_fns = fn_r;
- }
- ret_val = FPGA_SUCCESS;
- } else {
- printf ("%s: NULL Interface function table!\n", __FUNCTION__);
- }
- return ret_val;
-}
-
static int Virtex2_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
{
printf ("%s: Slave Serial Loading is unsupported\n", __FUNCTION__);
@@ -535,20 +433,4 @@ static int Virtex2_ss_dump (Xilinx_desc * desc, void *buf, size_t bsize)
return FPGA_FAIL;
}
-static int Virtex2_ss_reloc (Xilinx_desc * desc, ulong reloc_offset)
-{
- int ret_val = FPGA_FAIL;
- Xilinx_Virtex2_Slave_Serial_fns *fn =
- (Xilinx_Virtex2_Slave_Serial_fns *) (desc->iface_fns);
-
- if (fn) {
- printf ("%s:%d: Slave Serial Loading is unsupported\n",
- __FUNCTION__, __LINE__);
- } else {
- printf ("%s:%d: NULL Interface function table!\n",
- __FUNCTION__, __LINE__);
- }
- return ret_val;
-}
-
/* vim: set ts=4 tw=78: */