diff options
| author | Stefan Roese <sr@denx.de> | 2007-01-13 07:59:56 +0100 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2007-01-13 07:59:56 +0100 |
| commit | 77ddc5b9afb325262fd88752ba430a1dded1f0c7 (patch) | |
| tree | 4b7bef5c035ba1628645a267c4e10037d8c5b984 /include | |
| parent | 36adff362c2c0141ff8a810d42a7e478f779130f (diff) | |
[PATCH] Update Yellowstone (440GR) to display board rev and PCI bus speed
Now the board revision and the current PCI bus speed are printed after
the board message.
Also the EBC initialising is now done via defines in the board config
file.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/yellowstone.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/include/configs/yellowstone.h b/include/configs/yellowstone.h index 58717f8a6..911a52dbc 100644 --- a/include/configs/yellowstone.h +++ b/include/configs/yellowstone.h @@ -302,6 +302,20 @@ #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ /*----------------------------------------------------------------------- + * External Bus Controller (EBC) Setup + *----------------------------------------------------------------------*/ +#define CFG_FLASH CFG_FLASH_BASE +#define CFG_CPLD 0x80000000 + +/* Memory Bank 0 (NOR-FLASH) initialization */ +#define CFG_EBC_PB0AP 0x03017300 +#define CFG_EBC_PB0CR (CFG_FLASH | 0xda000) + +/* Memory Bank 2 (CPLD) initialization */ +#define CFG_EBC_PB2AP 0x04814500 +#define CFG_EBC_PB2CR (CFG_CPLD | 0x18000) + +/*----------------------------------------------------------------------- * Cache Configuration */ #define CFG_DCACHE_SIZE (32<<10) /* For AMCC 440 CPUs */ |