diff options
author | Michael Brandt <Michael.Brandt@stericsson.com> | 2009-11-23 10:42:36 +0100 |
---|---|---|
committer | Michael Brandt <Michael.Brandt@stericsson.com> | 2009-11-23 10:42:36 +0100 |
commit | b065b499073caa5d1579d54246aea3c53f0a365f (patch) | |
tree | 82282dc6e13912d7ad7e4c7c98e868f2222b0d31 /include | |
parent | c5fd9311b6c59a5fb4c6e7188c8bef96e3e2d86d (diff) | |
parent | fcffb680e77fcb48598d4a9944dbe2d4503170e0 (diff) |
Merge branch 'master' of http://git.denx.de/u-boot
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-arm/unaligned.h | 3 | ||||
-rw-r--r-- | include/asm-ppc/fsl_pci.h | 4 | ||||
-rw-r--r-- | include/configs/PLU405.h | 3 | ||||
-rw-r--r-- | include/configs/canyonlands.h | 2 | ||||
-rw-r--r-- | include/configs/lpd7a400-10.h | 1 | ||||
-rw-r--r-- | include/configs/lpd7a404-10.h | 1 | ||||
-rw-r--r-- | include/configs/lpd7a404.h | 2 | ||||
-rw-r--r-- | include/configs/mimc200.h | 2 | ||||
-rw-r--r-- | include/linux/unaligned/be_byteshift.h | 70 | ||||
-rw-r--r-- | include/linux/unaligned/le_byteshift.h | 70 | ||||
-rw-r--r-- | include/sja1000.h | 60 |
11 files changed, 209 insertions, 9 deletions
diff --git a/include/asm-arm/unaligned.h b/include/asm-arm/unaligned.h index d644df752..44593a894 100644 --- a/include/asm-arm/unaligned.h +++ b/include/asm-arm/unaligned.h @@ -1,7 +1,8 @@ #ifndef _ASM_ARM_UNALIGNED_H #define _ASM_ARM_UNALIGNED_H -#include <linux/unaligned/access_ok.h> +#include <linux/unaligned/le_byteshift.h> +#include <linux/unaligned/be_byteshift.h> #include <linux/unaligned/generic.h> /* diff --git a/include/asm-ppc/fsl_pci.h b/include/asm-ppc/fsl_pci.h index 6b0c89bd3..a5f72f5cd 100644 --- a/include/asm-ppc/fsl_pci.h +++ b/include/asm-ppc/fsl_pci.h @@ -25,6 +25,7 @@ int is_fsl_pci_agent(enum law_trgt_if trgt, u32 host_agent); int is_fsl_pci_cfg(enum law_trgt_if trgt, u32 io_sel); +int fsl_is_pci_agent(struct pci_controller *hose); void fsl_pci_init(struct pci_controller *hose, u32 cfg_addr, u32 cfg_data); void fsl_pci_config_unlock(struct pci_controller *hose); void ft_fsl_pci_setup(void *blob, const char *pci_alias, @@ -62,7 +63,6 @@ typedef struct pci_inbound_window { #define PIWAR_LOCAL 0x00f00000 #define PIWAR_READ_SNOOP 0x00050000 #define PIWAR_WRITE_SNOOP 0x00005000 -#define PIWAR_IWS_4K 0x0000000b u32 res2[3]; } pit_t; @@ -172,7 +172,7 @@ struct fsl_pci_info { }; int fsl_pci_init_port(struct fsl_pci_info *pci_info, - struct pci_controller *hose, int busno, int pcie_ep); + struct pci_controller *hose, int busno); #define SET_STD_PCI_INFO(x, num) \ { \ diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h index 2e41526af..2f84f7fcb 100644 --- a/include/configs/PLU405.h +++ b/include/configs/PLU405.h @@ -300,7 +300,8 @@ /* * External Bus Controller (EBC) Setup */ -#define CAN_BA 0xF0000000 /* CAN Base Address */ +#define CAN0_BA 0xF0000000 /* CAN0 Base Address */ +#define CAN1_BA 0xF0000100 /* CAN1 Base Address */ #define DUART0_BA 0xF0000400 /* DUART Base Address */ #define DUART1_BA 0xF0000408 /* DUART Base Address */ #define RTC_BA 0xF0000500 /* RTC Base Address */ diff --git a/include/configs/canyonlands.h b/include/configs/canyonlands.h index 3dddccfe7..ac9b3c505 100644 --- a/include/configs/canyonlands.h +++ b/include/configs/canyonlands.h @@ -593,7 +593,7 @@ #define CONFIG_SYS_EBC_PB1CR (CONFIG_SYS_FPGA_BASE | 0x3a000) /* BAS=FPGA,BS=2MB,BU=R/W,BW=16bit*/ #endif /* !defined(CONFIG_ARCHES) */ -#define CONFIG_SYS_EBC_CFG 0xB8400000 /* EBC0_CFG */ +#define CONFIG_SYS_EBC_CFG 0xbfc00000 /* * Arches doesn't use PerCS3 but GPIO43, so let's configure the GPIO diff --git a/include/configs/lpd7a400-10.h b/include/configs/lpd7a400-10.h index 5f57c3a5a..91bf1fabd 100644 --- a/include/configs/lpd7a400-10.h +++ b/include/configs/lpd7a400-10.h @@ -76,6 +76,5 @@ #define CONFIG_SMC91111 #define CONFIG_SMC91111_BASE (0x70000000) #undef CONFIG_SMC_USE_32_BIT -#define CONFIG_SMC_USE_IOFUNCS #endif /* __LPD7A400_10_H */ diff --git a/include/configs/lpd7a404-10.h b/include/configs/lpd7a404-10.h index 9074e28a0..b10e69d23 100644 --- a/include/configs/lpd7a404-10.h +++ b/include/configs/lpd7a404-10.h @@ -76,6 +76,5 @@ #define CONFIG_SMC91111 #define CONFIG_SMC91111_BASE (0x70000000) #undef CONFIG_SMC_USE_32_BIT -#define CONFIG_SMC_USE_IOFUNCS #endif /* __LPD7A404_10_H */ diff --git a/include/configs/lpd7a404.h b/include/configs/lpd7a404.h index 102c0af3b..557f389cc 100644 --- a/include/configs/lpd7a404.h +++ b/include/configs/lpd7a404.h @@ -72,7 +72,7 @@ #include <config_cmd_default.h> #ifndef USE_920T_MMU - #define CONFIG_CMD_PING) + #define CONFIG_CMD_PING #undef CONFIG_CMD_CACHE #else #define CONFIG_CMD_DATE diff --git a/include/configs/mimc200.h b/include/configs/mimc200.h index 8f71664f3..36488b32c 100644 --- a/include/configs/mimc200.h +++ b/include/configs/mimc200.h @@ -74,7 +74,7 @@ #define CONFIG_BAUDRATE 115200 #define CONFIG_BOOTARGS \ - "root=/dev/mtdblock1 rootfstype=jffs2 console=ttyS1" + "root=/dev/mtdblock1 rootfstype=jffs2 fbmem=512k console=ttyS1" #define CONFIG_BOOTCOMMAND \ "fsload boot/uImage; bootm" diff --git a/include/linux/unaligned/be_byteshift.h b/include/linux/unaligned/be_byteshift.h new file mode 100644 index 000000000..9356b2422 --- /dev/null +++ b/include/linux/unaligned/be_byteshift.h @@ -0,0 +1,70 @@ +#ifndef _LINUX_UNALIGNED_BE_BYTESHIFT_H +#define _LINUX_UNALIGNED_BE_BYTESHIFT_H + +#include <linux/types.h> + +static inline u16 __get_unaligned_be16(const u8 *p) +{ + return p[0] << 8 | p[1]; +} + +static inline u32 __get_unaligned_be32(const u8 *p) +{ + return p[0] << 24 | p[1] << 16 | p[2] << 8 | p[3]; +} + +static inline u64 __get_unaligned_be64(const u8 *p) +{ + return (u64)__get_unaligned_be32(p) << 32 | + __get_unaligned_be32(p + 4); +} + +static inline void __put_unaligned_be16(u16 val, u8 *p) +{ + *p++ = val >> 8; + *p++ = val; +} + +static inline void __put_unaligned_be32(u32 val, u8 *p) +{ + __put_unaligned_be16(val >> 16, p); + __put_unaligned_be16(val, p + 2); +} + +static inline void __put_unaligned_be64(u64 val, u8 *p) +{ + __put_unaligned_be32(val >> 32, p); + __put_unaligned_be32(val, p + 4); +} + +static inline u16 get_unaligned_be16(const void *p) +{ + return __get_unaligned_be16((const u8 *)p); +} + +static inline u32 get_unaligned_be32(const void *p) +{ + return __get_unaligned_be32((const u8 *)p); +} + +static inline u64 get_unaligned_be64(const void *p) +{ + return __get_unaligned_be64((const u8 *)p); +} + +static inline void put_unaligned_be16(u16 val, void *p) +{ + __put_unaligned_be16(val, p); +} + +static inline void put_unaligned_be32(u32 val, void *p) +{ + __put_unaligned_be32(val, p); +} + +static inline void put_unaligned_be64(u64 val, void *p) +{ + __put_unaligned_be64(val, p); +} + +#endif /* _LINUX_UNALIGNED_BE_BYTESHIFT_H */ diff --git a/include/linux/unaligned/le_byteshift.h b/include/linux/unaligned/le_byteshift.h new file mode 100644 index 000000000..be376fb79 --- /dev/null +++ b/include/linux/unaligned/le_byteshift.h @@ -0,0 +1,70 @@ +#ifndef _LINUX_UNALIGNED_LE_BYTESHIFT_H +#define _LINUX_UNALIGNED_LE_BYTESHIFT_H + +#include <linux/types.h> + +static inline u16 __get_unaligned_le16(const u8 *p) +{ + return p[0] | p[1] << 8; +} + +static inline u32 __get_unaligned_le32(const u8 *p) +{ + return p[0] | p[1] << 8 | p[2] << 16 | p[3] << 24; +} + +static inline u64 __get_unaligned_le64(const u8 *p) +{ + return (u64)__get_unaligned_le32(p + 4) << 32 | + __get_unaligned_le32(p); +} + +static inline void __put_unaligned_le16(u16 val, u8 *p) +{ + *p++ = val; + *p++ = val >> 8; +} + +static inline void __put_unaligned_le32(u32 val, u8 *p) +{ + __put_unaligned_le16(val >> 16, p + 2); + __put_unaligned_le16(val, p); +} + +static inline void __put_unaligned_le64(u64 val, u8 *p) +{ + __put_unaligned_le32(val >> 32, p + 4); + __put_unaligned_le32(val, p); +} + +static inline u16 get_unaligned_le16(const void *p) +{ + return __get_unaligned_le16((const u8 *)p); +} + +static inline u32 get_unaligned_le32(const void *p) +{ + return __get_unaligned_le32((const u8 *)p); +} + +static inline u64 get_unaligned_le64(const void *p) +{ + return __get_unaligned_le64((const u8 *)p); +} + +static inline void put_unaligned_le16(u16 val, void *p) +{ + __put_unaligned_le16(val, p); +} + +static inline void put_unaligned_le32(u32 val, void *p) +{ + __put_unaligned_le32(val, p); +} + +static inline void put_unaligned_le64(u64 val, void *p) +{ + __put_unaligned_le64(val, p); +} + +#endif /* _LINUX_UNALIGNED_LE_BYTESHIFT_H */ diff --git a/include/sja1000.h b/include/sja1000.h new file mode 100644 index 000000000..59e35afa0 --- /dev/null +++ b/include/sja1000.h @@ -0,0 +1,60 @@ +/* + * Copyright 2009, Matthias Fuchs <matthias.fuchs@esd.eu> + * + * SJA1000 register layout for basic CAN mode + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _SJA1000_H_ +#define _SJA1000_H_ + +/* + * SJA1000 register layout in basic can mode + */ +struct sja1000_basic_s { + u8 cr; + u8 cmr; + u8 sr; + u8 ir; + u8 ac; + u8 am; + u8 btr0; + u8 btr1; + u8 oc; + u8 txb[10]; + u8 rxb[10]; + u8 unused; + u8 cdr; +}; + +/* control register */ +#define CR_RR 0x01 + +/* output control register */ +#define OC_MODE0 0x01 +#define OC_MODE1 0x02 +#define OC_POL0 0x04 +#define OC_TN0 0x08 +#define OC_TP0 0x10 +#define OC_POL1 0x20 +#define OC_TN1 0x40 +#define OC_TP1 0x80 + +#endif |