diff options
| author | Wolfgang Denk <wd@denx.de> | 2009-07-07 21:06:07 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2009-07-07 21:06:07 +0200 |
| commit | bec9cab9291bb221714d559a44fe37669a8ca604 (patch) | |
| tree | 81498e05ecb1efdeae49915d4f2015653c1f4a0b /include | |
| parent | 37572cde7f0bf3f33b6d3b9ed5cc7c479f6802c4 (diff) | |
| parent | 1260233982f7dfbdfd1adee12daa95a0c0e84a43 (diff) | |
Merge branch 'master' of git://git.denx.de/u-boot-mpc5xxx
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/digsy_mtc.h | 23 | ||||
| -rw-r--r-- | include/mpc5xxx.h | 18 |
2 files changed, 41 insertions, 0 deletions
diff --git a/include/configs/digsy_mtc.h b/include/configs/digsy_mtc.h index 66badd702..558010fa7 100644 --- a/include/configs/digsy_mtc.h +++ b/include/configs/digsy_mtc.h @@ -100,6 +100,7 @@ #define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO #define CONFIG_CMD_SAVES +#define CONFIG_CMD_SPI #define CONFIG_CMD_USB #if (TEXT_BASE == 0xFF000000) @@ -137,6 +138,12 @@ "" /* + * SPI configuration + */ +#define CONFIG_HARD_SPI 1 +#define CONFIG_MPC52XX_SPI 1 + +/* * I2C configuration */ #define CONFIG_HARD_I2C 1 @@ -241,6 +248,22 @@ /* * GPIO configuration + * use pin gpio_wkup_6 as second SDRAM chip select (mem_cs1) + * Bit 0 (mask 0x80000000) : 0x1 + * SPI on Tmr2/3/4/5 pins + * Bit 2:3 (mask 0x30000000) : 0x2 + * ATA cs0/1 on csb_4/5 + * Bit 6:7 (mask 0x03000000) : 0x2 + * Ethernet 100Mbit with MD + * Bits 12:15 (mask 0x000f0000): 0x5 + * USB - Two UARTs + * Bits 18:19 (mask 0x00003000) : 0x2 + * PSC3 - USB2 on PSC3 + * Bits 20:23 (mask 0x00000f00) : 0x1 + * PSC2 - CAN1&2 on PSC2 pins + * Bits 25:27 (mask 0x00000070) : 0x1 + * PSC1 - AC97 functionality + * Bits 29:31 (mask 0x00000007) : 0x2 */ #define CONFIG_SYS_GPS_PORT_CONFIG 0xA2552112 diff --git a/include/mpc5xxx.h b/include/mpc5xxx.h index 463d5ae4b..476d1498c 100644 --- a/include/mpc5xxx.h +++ b/include/mpc5xxx.h @@ -392,6 +392,24 @@ #define I2C_IF 0x02 #define I2C_RXAK 0x01 +/* SPI control register 1 bits */ +#define SPI_CR_LSBFE 0x01 +#define SPI_CR_SSOE 0x02 +#define SPI_CR_CPHA 0x04 +#define SPI_CR_CPOL 0x08 +#define SPI_CR_MSTR 0x10 +#define SPI_CR_SWOM 0x20 +#define SPI_CR_SPE 0x40 +#define SPI_CR_SPIE 0x80 + +/* SPI status register bits */ +#define SPI_SR_MODF 0x10 +#define SPI_SR_WCOL 0x40 +#define SPI_SR_SPIF 0x80 + +/* SPI port data register bits */ +#define SPI_PDR_SS 0x08 + /* Programmable Serial Controller (PSC) status register bits */ #define PSC_SR_CDE 0x0080 #define PSC_SR_RXRDY 0x0100 |