summaryrefslogtreecommitdiff
path: root/include/configs
diff options
context:
space:
mode:
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/ATUM8548.h2
-rw-r--r--include/configs/MPC8540ADS.h1
-rw-r--r--include/configs/MPC8540EVAL.h2
-rw-r--r--include/configs/MPC8541CDS.h1
-rw-r--r--include/configs/MPC8544DS.h2
-rw-r--r--include/configs/MPC8548CDS.h1
-rw-r--r--include/configs/MPC8555CDS.h1
-rw-r--r--include/configs/MPC8560ADS.h1
-rw-r--r--include/configs/MPC8568MDS.h1
-rw-r--r--include/configs/PM854.h1
-rw-r--r--include/configs/PM856.h1
-rw-r--r--include/configs/SBC8540.h1
-rw-r--r--include/configs/TQM85xx.h2
-rw-r--r--include/configs/sbc8548.h1
-rw-r--r--include/configs/sbc8560.h1
-rw-r--r--include/configs/stxgp3.h1
-rw-r--r--include/configs/stxssa.h1
17 files changed, 21 insertions, 0 deletions
diff --git a/include/configs/ATUM8548.h b/include/configs/ATUM8548.h
index f7020b495..c14376e7f 100644
--- a/include/configs/ATUM8548.h
+++ b/include/configs/ATUM8548.h
@@ -63,6 +63,8 @@
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
#define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */
+#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
+
#define MPC85xx_DDR_SDRAM_CLK_CNTL /* 85xx has clock control reg */
#define CONFIG_SYS_CLK_FREQ 33000000
diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h
index afce7fb78..5ea7b2504 100644
--- a/include/configs/MPC8540ADS.h
+++ b/include/configs/MPC8540ADS.h
@@ -55,6 +55,7 @@
#define CONFIG_DDR_ECC /* only for ECC DDR module */
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
+#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
/*
* sysclk for MPC85xx
diff --git a/include/configs/MPC8540EVAL.h b/include/configs/MPC8540EVAL.h
index 2868dcb8a..bf64f2704 100644
--- a/include/configs/MPC8540EVAL.h
+++ b/include/configs/MPC8540EVAL.h
@@ -43,6 +43,8 @@
#undef CONFIG_DDR_ECC /* only for ECC DDR module */
#define CONFIG_DDR_DLL /* possible DLL fix needed */
+#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
+
/* Using Localbus SDRAM to emulate flash before we can program the flash,
* normally you only need a flash-boot image(u-boot.bin),if unsure undef this.
* Not availabe for EVAL board
diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h
index c83382f0d..7334088b1 100644
--- a/include/configs/MPC8541CDS.h
+++ b/include/configs/MPC8541CDS.h
@@ -47,6 +47,7 @@
#define CONFIG_DDR_ECC /* only for ECC DDR module */
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
+#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
/*
* When initializing flash, if we cannot find the manufacturer ID,
diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h
index 5a96db5ab..a8942095c 100644
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -42,6 +42,8 @@
#define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */
#define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */
+#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
+
#define CONFIG_TSEC_ENET /* tsec ethernet support */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index 90beb2521..a3db9f445 100644
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -55,6 +55,7 @@
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
#define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */
+#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
/*
* When initializing flash, if we cannot find the manufacturer ID,
diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h
index 76d673cd0..93877aedb 100644
--- a/include/configs/MPC8555CDS.h
+++ b/include/configs/MPC8555CDS.h
@@ -47,6 +47,7 @@
#define CONFIG_DDR_ECC /* only for ECC DDR module */
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
+#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
/*
* When initializing flash, if we cannot find the manufacturer ID,
diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h
index 5f105552f..08884b36f 100644
--- a/include/configs/MPC8560ADS.h
+++ b/include/configs/MPC8560ADS.h
@@ -52,6 +52,7 @@
#define CONFIG_DDR_ECC /* only for ECC DDR module */
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
+#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
/*
* sysclk for MPC85xx
diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h
index 2b089d90d..a12d193c7 100644
--- a/include/configs/MPC8568MDS.h
+++ b/include/configs/MPC8568MDS.h
@@ -49,6 +49,7 @@
/*#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER*/ /* DDR controller or DMA? */
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
+#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
/*
* When initializing flash, if we cannot find the manufacturer ID,
diff --git a/include/configs/PM854.h b/include/configs/PM854.h
index f0d0399a9..819bee70a 100644
--- a/include/configs/PM854.h
+++ b/include/configs/PM854.h
@@ -51,6 +51,7 @@
#define CONFIG_DDR_ECC /* only for ECC DDR module */
#define CONFIG_MEM_INIT_VALUE 0xDEADBEEF
+#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
/*
* sysclk for MPC85xx
diff --git a/include/configs/PM856.h b/include/configs/PM856.h
index ae2645c07..8902f42ff 100644
--- a/include/configs/PM856.h
+++ b/include/configs/PM856.h
@@ -51,6 +51,7 @@
#define CONFIG_DDR_2T_TIMING /* Sets the 2T timing bit */
#define CONFIG_MEM_INIT_VALUE 0xDEADBEEF
+#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
/*
* sysclk for MPC85xx
diff --git a/include/configs/SBC8540.h b/include/configs/SBC8540.h
index 3ca85b8a9..2bbfe9aa6 100644
--- a/include/configs/SBC8540.h
+++ b/include/configs/SBC8540.h
@@ -56,6 +56,7 @@
#undef CONFIG_PCI /* pci ethernet support */
#undef CONFIG_ETHER_ON_FCC /* cpm FCC ethernet support */
+#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
#define CONFIG_ENV_OVERWRITE
diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h
index f3b1a53fe..dd0654b70 100644
--- a/include/configs/TQM85xx.h
+++ b/include/configs/TQM85xx.h
@@ -50,6 +50,8 @@
#define CONFIG_CPM2 1 /* has CPM2 */
#endif
+#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
+
/*
* sysclk for MPC85xx
*
diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h
index c050a061b..0a7a90497 100644
--- a/include/configs/sbc8548.h
+++ b/include/configs/sbc8548.h
@@ -56,6 +56,7 @@
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
#define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */
+#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
#define MPC85xx_DDR_SDRAM_CLK_CNTL /* 85xx has clock control reg */
diff --git a/include/configs/sbc8560.h b/include/configs/sbc8560.h
index b71ba785b..f9ede5f18 100644
--- a/include/configs/sbc8560.h
+++ b/include/configs/sbc8560.h
@@ -50,6 +50,7 @@
#undef CONFIG_PCI /* pci ethernet support */
#undef CONFIG_ETHER_ON_FCC /* cpm FCC ethernet support */
+#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
#define CONFIG_ENV_OVERWRITE
diff --git a/include/configs/stxgp3.h b/include/configs/stxgp3.h
index 3baa32c8d..047e1cf99 100644
--- a/include/configs/stxgp3.h
+++ b/include/configs/stxgp3.h
@@ -51,6 +51,7 @@
#define CONFIG_DDR_DLL /* possible DLL fix needed */
#define CONFIG_DDR_2T_TIMING /* Sets the 2T timing bit */
+#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
/* sysclk for MPC85xx
*/
diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h
index 9457bce0a..e09dd7163 100644
--- a/include/configs/stxssa.h
+++ b/include/configs/stxssa.h
@@ -51,6 +51,7 @@
#undef CONFIG_DDR_DLL /* possible DLL fix needed */
#define CONFIG_DDR_2T_TIMING /* Sets the 2T timing bit */
+#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
/* sysclk for MPC85xx
*/
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-16 04:09:20 +0000