summaryrefslogtreecommitdiff
path: root/cpu
AgeCommit message (Expand)Author
2009-10-18TI: OMAP3: Remove SZ_xx referencesSandeep Paulraj
2009-10-13Clean-up of cpu_arm920t and cpu_arm920t_s3c24x0 codekevin.morfitt@fearnside-systems.co.uk
2009-10-13CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boardskevin.morfitt@fearnside-systems.co.uk
2009-10-13s5pc1xx: support Samsung s5pc1xx SoCMinkyu Kang
2009-10-13arm: Correct build with CONFIG_SYS_HUSH_PARSER setSimon Kagstrom
2009-10-13Add support for Eukrea CPU9260/CPU9G20 SBCTom Rix
2009-10-13Add support for Eukrea CPUAT91 SBCTom Rix
2009-10-13TI DaVinci: DM646x: Initial Support for DM646x SOCSandeep Paulraj
2009-10-13OMAP3 Move cache routine to cache.STom Rix
2009-10-09Merge branch 'reloc'Wolfgang Denk
2009-10-08relocation: Do not relocate NULL pointers.Joakim Tjernlund
2009-10-0885xx: Ensure BSS segment isn't linked at address 0Peter Tyser
2009-10-08mpc512x: fix fixed_sdram() init code.Wolfgang Denk
2009-10-07ppc4xx: Rework cmd reginfoNiklaus Giger
2009-10-07ppc_4xx: Apply new HW register namesNiklaus Giger
2009-10-07ppc4xx: Add PPC405EX(r) Rev D supportStefan Roese
2009-10-07ppc4xx: Fix msg "initialization as root-complex failed" upon PCIe scanStefan Roese
2009-10-07PPC4xx: Denali core: Fix incorrect DDR row bitsMike Nuss
2009-10-03ppc: Enable full relocation to RAMPeter Tyser
2009-10-02ppc4xx: Merge PPC4xx DDR and DDR2 ECC handlingStefan Roese
2009-10-02ppc4xx: Reorganize DDR2 ECC handlingFelix Radensky
2009-09-30Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk
2009-09-28ppc4xx: Remove mtsdram0() marcos and use common mtsdram() insteadStefan Roese
2009-09-28ppc4xx: Convert PPC4xx SDRAM defines from lower case to upper caseStefan Roese
2009-09-28ppc4xx: Convert PPC4xx UIC defines from lower case to upper caseStefan Roese
2009-09-26mpc83xx: retain POR values of non-configured ACR, SPCR, SCCR, and LCRR bitfieldsKim Phillips
2009-09-25mucmc52, uc101: delete ata@3a00 node, if no CF card is detectedHeiko Schocher
2009-09-25mpc512x: Streamlined fixed_sdram() init sequence.Martha M Stan
2009-09-24ppc/p4080: Determine various chip frequencies on CoreNet platformsKumar Gala
2009-09-24ppc/p4080: Handle timebase enabling and frequency reportingKumar Gala
2009-09-24ppc/p4080: Add various p4080 related defines (and p4040)Kumar Gala
2009-09-24ppc/p4080: CoreNet platfrom style secondary core releaseKumar Gala
2009-09-24ppc/p4080: CoreNet platfrom style CCSRBAR settingKumar Gala
2009-09-24ppc/85xx: Fix enabling of L2 cacheKumar Gala
2009-09-2485xx-fdt: Fixed l2-ctlr's compatible prop for QorIQVivek Mahajan
2009-09-24ppc/85xx: add cpu init config file for boot from NANDMingkai Hu
2009-09-24ppc/85xx: add ld script file for boot from NANDMingkai Hu
2009-09-23ppc4xx: Fix PCIE PLL lock on 440SPe Yucca boardRupjyoti Sarmah
2009-09-17ppc4xx: Consolidate get_OPB_freq()Stefan Roese
2009-09-17ppc4xx: Fix 405EZ uart base baud calculationStefan Roese
2009-09-15ppc/85xx: Disable all async interrupt sources when we bootKumar Gala
2009-09-15ppc/85xx: Split out cpu_init_early into its own file for NAND_SPLKumar Gala
2009-09-15ppc/85xx: Change cpu_init_early_f so we can use with NAND SPLKumar Gala
2009-09-15ppc/85xx: add boot from NAND/eSDHC/eSPI supportMingkai Hu
2009-09-15ppc/85xx: Move code around to prep for NAND_SPLKumar Gala
2009-09-15ppc/85xx: Repack tlb_table to save spaceKumar Gala
2009-09-15ppc/85xx: Introduce low level write_tlb functionKumar Gala
2009-09-15ppc/8xxx: Misc DDR related fixesKumar Gala
2009-09-15ppc/85xx: Remove some bogus code from external interrupt handler.Scott Wood
2009-09-15ppc/85xx: Ensure that MAS8 is zero when writing TLB entries.Scott Wood
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-16 14:22:15 +0000