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2016-11-09MIPS: rename M6201 core to M6250Vicente Olivert Riera
m6201 is the -march option for GCC, but the real core name is M6250. Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com> Reviewed-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2016-11-09MIPS: rename M5101 core to M5150Vicente Olivert Riera
m5101 is the -march option for GCC, but the real core name is M5150. Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com> Reviewed-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2016-11-09MIPS: remove M5100 coreVicente Olivert Riera
This is a microcontroller class (MCU) core which is not suitable for running Linux. Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com> Reviewed-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2016-11-09arch/Config.in.mips: add support for XBurst coresVicente Olivert Riera
The Ingenic XBurst is a MIPS32R2 microprocessor. It has a bug in the FPU that can generate incorrect results in certain cases. The problem shows up when you have several fused madd instructions in sequence with dependant operands. Using the -mno-fused-madd option prevents gcc from emitting these instructions. This patch adds changes to the toolchain wrapper to use that option. Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2016-10-19MIPS: add support for M6201 coresVicente Olivert Riera
-march=m6201 is not yet supported in GCC upstream, so disabling all versions when selecting this core. Note that M6201 implies a MIPS R6 CPU, and some GCC versions are already disabled for R6, so we don't need to disable those ones for M6201 as well. The external Codescape IMG GNU Linux Toolchain has support for this core. Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2016-10-15MIPS: add support for P6600 coresVicente Olivert Riera
-march=p6600 is not yet supported in GCC upstream, so disabling all versions when selecting this core. Note that P6600 implies a MIPS R6 CPU, and some GCC versions are already disabled for R6, so we don't need to disable those ones for P6600 as well. The external Codescape IMG GNU Linux Toolchain has support for this core. Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com> Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2016-10-15MIPS: add support for P5600 coresVicente Olivert Riera
Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com> Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2016-10-15MIPS: add support for I6400 coresVicente Olivert Riera
-march=i6400 support starts from GCC-6, so disable previous versions when selecting this core. Note that I6400 implies a MIPS R6 CPU, and some GCC versions are already disabled for R6, so we don't need to disable those ones for I6400 as well. Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com> Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2016-10-15MIPS: add support for M5101 coresVicente Olivert Riera
-march=m5101 support starts from GCC-6, so disable previous versions when selecting this core. Note that M5101 implies a MIPS R5 CPU, and some GCC versions are already disabled for R5, so we don't need to disable those ones for M5101 as well. Also disable external toolchains that don't support this core. Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com> Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2016-10-15MIPS: add support for M5100 coresVicente Olivert Riera
-march=m5100 support starts from GCC-6, so disable previous versions when selecting this core. Note that M5100 implies a MIPS R5 CPU, and some GCC versions are already disabled for R5, so we don't need to disable those ones for M5100 as well. Also disable external toolchains that don't support this core. Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com> Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2016-10-15MIPS: add support for interAptiv coresVicente Olivert Riera
-march=interaptiv support starts from GCC-6, so disable previous versions when selecting this core. Also disable external toolchains that don't support this core. Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com> Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2016-10-15MIPS: add mips64r5 generic architecture variantVicente Olivert Riera
-march=mips64r5 support started from GCC-5, so disable previous versions when the CPU is R5. Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com> Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2016-10-15MIPS: add mips32r5 generic architecture variantVicente Olivert Riera
-march=mips32r5 support started from GCC-5, so disable previous versions when the CPU is R5. Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com> Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2016-10-15MIPS: state that the current architecture variants are genericVicente Olivert Riera
Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com> Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2016-10-15MIPS: target architecture variants select the appropriate CPU ISAVicente Olivert Riera
Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com> Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2016-10-15MIPS: add default CPU ISAsVicente Olivert Riera
Meant to be used by the target architecture variants. Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com> Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2016-02-06arch: remove BR2_ARCH_HAS_ATOMICS optionThomas Petazzoni
Now that BR2_ARCH_HAS_ATOMICS is no longer used anywhere, we can remove it from arch/Config.in*, as well as from the documentation. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
2015-10-12arch: add support for mips32r6 and mips64r6 variantsVicente Olivert Riera
- Add support for mips32r6 and mips64r6 target architecture variants - Disable unsupported gcc versions - Disable unsupported binutils versions - Disable unsupported external toolchains - Disable unsuported C libraries - Add a hook in order to make glibc compile for MIPS R6. [Thomas: slightly tweak the glibc hack explanation, to make it hopefully clearer.] Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2015-10-09arch/mips: remove some remaining mips1/2/3/4 bitsVicente Olivert Riera
Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com> Reviewed-by: Gustavo Zacarias <gustavo@zacarias.com.ar> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2014-12-01arch/mips: remove deprecated mips1/2/3/4 supportGustavo Zacarias
Remove the support for generating mips1/2/3/4 code since it has been deprecated for more than a year now. Also remove the unnecessary kludges in packages for it. Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar> Acked-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com> Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-08-18arch/mips: always has atomic opsYann E. MORIN
Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Anton Kolesov <Anton.Kolesov@synopsys.com> Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-03-28Disable o32 ABI for MIPS64 architecturesVicente Olivert Riera
Building o32 ELF files for MIPS64 is an exotic configuration that nobody should be using. If o32 is required, then is better if it's built for MIPS 32-bit cores so only 32-bit instructions will be used leading to a more efficient o32 usage. Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com> Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-01-10deprecated handling: introduce BR2_DEPRECATED_SINCE_xxxx_xxThomas De Schampheleire
In order to keep better track of when a feature got deprecated, and hence when it can be removed, a new set of symbols BR2_DEPRECATED_SINCE_xxxx_xx is introduced. These symbols are automatically selected when BR2_DEPRECATED is selected, and thus are transparent to the user. A deprecated feature will no longer depend on BR2_DEPRECATED directly, but rather on the appropriate BR2_DEPRECATED_SINCE_xxxx_xx. If that symbol does not yet exist, it has to be created in Config.in. When removing a deprecated feature, one should also check whether this was the last feature using the BR2_DEPRECATED_SINCE_xxxx_xx symbol, in which case the latter can be removed from Config.in. A followup patch will make sure the overview is added to the list of deprecated features in the manual, so that a buildroot core developer can easily determine which features to remove in a given development cycle. Signed-off-by: Thomas De Schampheleire <thomas.de.schampheleire@gmail.com> Acked-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be> Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2014-01-03Disable MIPS64 ISAs for MIPS32 targetsVicente Olivert Riera
Currently you can select MIPS64 ISAs, like mips64 and mips64r2, for MIPS32 targets. This is incorrect, so we disable the possibility to do that. Reviewed-by: Markos Chandras <markos.chandras@imgtec.com> Signed-off-by: Vicente Olivert Riera <vincent.riera@imgtec.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2013-11-20Mark MIPS I, II, III and IV as deprecatedVicente Olivert Riera
Deprecate old MIPS ISAs since they are rarely used anymore and they cause multiple build problems for new packages Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com> Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2013-10-30arch/Config.in: introduce BR2_KERNEL_64_USERLAND_32 symbolGustavo Zacarias
On some architectures one can be running a 64-bit kernel with a 32-bit userland. Such is the case for sparc64 (unsupported) for example and mips64 with n32 ABI. Some tools that interface directly with the kernel need to be built specially for this, so introduce this symbol to tweak their build in one central kludge to be future-proof. Example: bug #6602. Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2013-10-30arch/mips: Set BR2_GCC_TARGET_ARCH for MIPSMarkos Chandras
Set --with-arch instead of --with-tune for MIPS so that the generated code will be optimal for the given MIPS ISA. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2013-07-16arch: Refactor BR2_SOFT_FLOAT into per-architecture optionsThomas Petazzoni
As we are going to introduced a more advanced support of floating point options for the ARM architecture, we need to adjust how the soft-float option is handled. We replace the current hidden option BR2_PREFER_SOFT_FLOAT option and the visible BR2_SOFT_FLOAT option by: * A global hidden BR2_SOFT_FLOAT option, defined in arch/Config.in, that tells whether the architecture-specific code is using software emulated floating point. This hidden option can be used throughout Buildroot to determine whether soft float is used or not. * Per-architecture visible BR2_<arch>_SOFT_FLOAT options, for the architecture for which it makes sense, which allows users to select soft float emulation when needed. This change will allow each architecture to have a different way of presenting its floating point capabilities. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-11-15arch: Config.in string configuration options must be quotedThomas Petazzoni
Suggested by Yann E. Morin. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reported-by: "Yann E. MORIN" <yann.morin.1998@free.fr> Acked-by: "Yann E. MORIN" <yann.morin.1998@free.fr> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-11-15arch: improve definition of gcc mtune, mcpu, etc.Thomas Petazzoni
As suggested by Yann E. Morin, there is a better way than our current big Config.in.common to define the gcc mtune, mcpu, march, etc. values. We can split the setting of those values in each architecture file, which makes a lot more sense. Therefore, the Config.in file now creates empty kconfig variables BR2_ARCH, BR2_ENDIAN, BR2_GCC_TARGET_TUNE, BR2_GCC_TARGET_ARCH, BR2_GCC_TARGET_ABI and BR2_GCC_TARGET_CPU. The values of those variables are set by the individual Config.in.<arch> files. This is possible because such files are now only conditionally included depending on the top-level architecture that has been selected. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: "Yann E. MORIN" <yann.morin.1998@free.fr> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2012-11-04Split target/Config.in.arch into multiple Config.in.* in arch/Thomas Petazzoni
target/Config.in.arch had become too long, and we want to remove the target/ directory. So let's move it to arch/ and split it this way: * An initial Config.in that lists the top-level architecture, and sources the arch-specific Config.in.<arch> files, as well as Config.in.common (see below) * One Config.in.<arch> per architecture, listing the CPU families, ABI choices, etc. * One Config.in.common that defines the gcc mtune, march, mcpu values and other hidden options. [Peter: space->tab fix, mipsel64 little endian, mips3 as noted by Arnout] Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
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