diff options
author | Damien Lespiau <damien.lespiau@intel.com> | 2013-01-15 17:35:24 +0000 |
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committer | Damien Lespiau <damien.lespiau@intel.com> | 2013-03-04 15:54:36 +0000 |
commit | 1f1ad5974655a241bcf202bcd79a3e2d236bcc1c (patch) | |
tree | 294f3c0588e18e8c61d0431d06ab21dc4cc77eea /assembler/brw_structs.h | |
parent | 668e0dff7da8a604e626c1c5fefe65a3a8f2be19 (diff) |
assembler: Rename dp_gen6 to gen6_dp and sync with Mesa's
The purpose of this commit is to synchronize opcode definitions across
the gen4asm assembler and mesa.
I had to drop how mesa splits msg_control as the current assembly
language gives access the the whole msg_control field.
Recompiling the xorg and the intel driver of libva shaders doesn't show
any difference in the assembly created.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Diffstat (limited to 'assembler/brw_structs.h')
-rw-r--r-- | assembler/brw_structs.h | 34 |
1 files changed, 22 insertions, 12 deletions
diff --git a/assembler/brw_structs.h b/assembler/brw_structs.h index e2be147c..e5710529 100644 --- a/assembler/brw_structs.h +++ b/assembler/brw_structs.h @@ -1513,18 +1513,28 @@ struct brw_instruction GLuint end_of_thread:1; } dp_write_gen6; - struct { - GLuint binding_table_index:8; - GLuint msg_control:5; - GLuint msg_type:4; - GLuint send_commit_msg:1; /* ignore on read message */ - GLuint pad0:1; - GLuint header_present:1; - GLuint response_length:5; - GLuint msg_length:4; - GLuint pad1:2; - GLuint end_of_thread:1; - } dp_gen6; + /** + * Message for the Sandybridge Render Cache Data Port. + * + * Most fields are defined in the Sandybridge PRM, Volume 4 Part 1, + * Section 3.9.2.1.1: Message Descriptor. + * + * "Slot Group Select" and "Last Render Target" are part of the + * 5-bit message control for Render Target Write messages. See + * Section 3.9.9.2.1 of the same volume. + */ + struct { + GLuint binding_table_index:8; + GLuint msg_control:5; + GLuint msg_type:4; + GLuint send_commit_msg:1; + GLuint pad0:1; + GLuint header_present:1; + GLuint response_length:5; + GLuint msg_length:4; + GLuint pad1:2; + GLuint end_of_thread:1; + } gen6_dp; struct { GLuint binding_table_index:8; |