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authorMika Kahola <mika.kahola@intel.com>2017-12-07 14:36:34 +0200
committerRodrigo Vivi <rodrigo.vivi@intel.com>2018-01-08 16:56:18 -0800
commit834321a5d76a16783000441a02d7e79e72be9cc9 (patch)
tree713167c0cd69dffa61c0dea318c339ee8911f1ce /tools/Makefile.sources
parentd5e51a60e5cbb807bcacd2655bd4ffe90a686bbb (diff)
tools: Cannonlake port clock programming
Cannonlake port clock programming tests and verifies DPLL legal dividers P, Q, and K. This tests adds two reference clocks 19.2MHz and 24MHz to test algorithm's capability to find P, Q, and K dividers as well as DCO frequency for different symbol clock rates. The test compares two algorithms, the reference with double precision and i915 implementation with fixed point precision. In case of a difference in computation the difference on dividers is printed out to the screen. Signed-off-by: Mika Kahola <mika.kahola@intel.com> Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'tools/Makefile.sources')
-rw-r--r--tools/Makefile.sources1
1 files changed, 1 insertions, 0 deletions
diff --git a/tools/Makefile.sources b/tools/Makefile.sources
index c49ab8f0..abd23a0f 100644
--- a/tools/Makefile.sources
+++ b/tools/Makefile.sources
@@ -2,6 +2,7 @@ noinst_PROGRAMS = \
hsw_compute_wrpll \
skl_compute_wrpll \
skl_ddb_allocation \
+ cnl_compute_wrpll \
$(NULL)
tools_prog_lists = \