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authorLukasz Kalamarz <lukasz.kalamarz@intel.com>2018-07-12 16:15:23 +0200
committerKatarzyna Dec <katarzyna.dec@intel.com>2018-07-18 10:52:44 +0200
commit435c5093aa2043eb832a5f4cb468d7141488e14c (patch)
tree1bd40ab31a7d37d53477616dbf72f06f559d9e54 /tools/null_state_gen/intel_renderstate_gen8.c
parent61370b2d43db63242646a6987a13caa8c2f8a0d8 (diff)
lib/rendercopy: Use gen4 definitions if applicable
Instead of using definitions duplicated in gen7_render header, we should use the oldest definition that is working with chosen gen. This patch reuse gen6 definitons if registers/fields/shifts that were introduced in other genX_render headers. v3: Rebase and checkpatch Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com> Cc: Katarzyna Dec <katarzyna.dec@intel.com> Cc: Antonio Argenziano <antonio.argenziano@intel.com> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
Diffstat (limited to 'tools/null_state_gen/intel_renderstate_gen8.c')
-rw-r--r--tools/null_state_gen/intel_renderstate_gen8.c38
1 files changed, 19 insertions, 19 deletions
diff --git a/tools/null_state_gen/intel_renderstate_gen8.c b/tools/null_state_gen/intel_renderstate_gen8.c
index c6973e0e..17822c44 100644
--- a/tools/null_state_gen/intel_renderstate_gen8.c
+++ b/tools/null_state_gen/intel_renderstate_gen8.c
@@ -152,7 +152,7 @@ static void gen8_emit_so_buffer(struct intel_batchbuffer *batch, const int index
static void gen8_emit_state_base_address(struct intel_batchbuffer *batch) {
const unsigned offset = 0;
- OUT_BATCH(GEN6_STATE_BASE_ADDRESS | (16 - 2));
+ OUT_BATCH(GEN4_STATE_BASE_ADDRESS | (16 - 2));
/* general */
OUT_RELOC(batch, 0, 0, offset | BASE_ADDRESS_MODIFY);
@@ -200,10 +200,10 @@ static void gen8_emit_vertex_buffers(struct intel_batchbuffer *batch)
const int buffers = 33;
int i;
- OUT_BATCH(GEN6_3DSTATE_VERTEX_BUFFERS | ((4 * buffers) - 1));
+ OUT_BATCH(GEN4_3DSTATE_VERTEX_BUFFERS | ((4 * buffers) - 1));
for (i = 0; i < buffers; i++) {
- OUT_BATCH(i << VB0_BUFFER_INDEX_SHIFT |
+ OUT_BATCH(i << GEN6_VB0_BUFFER_INDEX_SHIFT |
GEN8_VB0_BUFFER_ADDR_MOD_EN);
OUT_BATCH(0); /* Addr */
OUT_BATCH(0);
@@ -216,16 +216,16 @@ static void gen6_emit_vertex_elements(struct intel_batchbuffer *batch)
const int elements = 34;
int i;
- OUT_BATCH(GEN6_3DSTATE_VERTEX_ELEMENTS | ((2 * elements - 1)));
+ OUT_BATCH(GEN4_3DSTATE_VERTEX_ELEMENTS | ((2 * elements - 1)));
for (i = 0; i < elements; i++) {
if (i == 0) {
- OUT_BATCH(VE0_VALID | i);
+ OUT_BATCH(GEN6_VE0_VALID | i);
OUT_BATCH(
- GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_0_SHIFT |
- GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_1_SHIFT |
- GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT |
- GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_3_SHIFT
+ GEN4_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_0_SHIFT |
+ GEN4_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_1_SHIFT |
+ GEN4_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT |
+ GEN4_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_3_SHIFT
);
} else {
OUT_BATCH(0);
@@ -314,13 +314,13 @@ static void gen8_emit_viewport_state_pointers_sf_clip(struct intel_batchbuffer *
static void gen8_emit_primitive(struct intel_batchbuffer *batch)
{
- OUT_BATCH(GEN6_3DPRIMITIVE | (7-2));
- OUT_BATCH(4); /* gen8+ ignore the topology type field */
- OUT_BATCH(1); /* vertex count */
- OUT_BATCH(0);
- OUT_BATCH(1); /* single instance */
- OUT_BATCH(0); /* start instance location */
- OUT_BATCH(0); /* index buffer offset, ignored */
+ OUT_BATCH(GEN4_3DPRIMITIVE | (7 - 2));
+ OUT_BATCH(4); /* gen8+ ignore the topology type field */
+ OUT_BATCH(1); /* vertex count */
+ OUT_BATCH(0);
+ OUT_BATCH(1); /* single instance */
+ OUT_BATCH(0); /* start instance location */
+ OUT_BATCH(0); /* index buffer offset, ignored */
}
void gen8_setup_null_render_state(struct intel_batchbuffer *batch)
@@ -334,7 +334,7 @@ void gen8_setup_null_render_state(struct intel_batchbuffer *batch)
OUT_BATCH(0);
OUT_BATCH(0);
- OUT_BATCH(GEN6_PIPELINE_SELECT | PIPELINE_SELECT_3D);
+ OUT_BATCH(G4X_PIPELINE_SELECT | PIPELINE_SELECT_3D);
gen8_emit_wm(batch);
gen8_emit_ps(batch);
@@ -383,8 +383,8 @@ void gen8_setup_null_render_state(struct intel_batchbuffer *batch)
gen8_emit_state_base_address(batch);
- OUT_CMD(GEN6_STATE_SIP, 3);
- OUT_CMD(GEN6_3DSTATE_DRAWING_RECTANGLE, 4);
+ OUT_CMD(GEN4_STATE_SIP, 3);
+ OUT_CMD(GEN4_3DSTATE_DRAWING_RECTANGLE, 4);
OUT_CMD(GEN7_3DSTATE_DEPTH_BUFFER, 8);
gen8_emit_chroma_key(batch, 0);