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Add CML IDS, an additional ICL ID and EHL.
Align with kernel commits:
a7b4deeb02b9 ("drm/i915/cml: Add CML PCI IDS")
9a751b999d17 ("drm/i915: Add new ICL PCI ID")
29f3863d33d1 ("drm/i915/ehl: Add EHL platform info and PCI IDs")
This is in sync with kernel header as of
b024ab9b2d3a ("drm/i915/bios: iterate over child devices to initialize ddi_port_info")
v2: Copy header from kernel (Jose)
- Change commit message (Lucas)
v3: Add corresponding kernel commit ids (Antonio)
v4: Add EHL (Lucas)
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
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Add more PCI Device IDs for Coffee Lake and Ice Lake.
Align with kernel commits:
5e0f5a58b167 ("drm/i915/cfl: Adding another PCI Device ID.")
03ca3cf8e9aa ("drm/i915/icl: Adding few more device IDs for Ice Lake")
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
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One more AML ID added and WHL IDs reorganized.
Align with commit c0c46ca461f1 ("drm/i915/aml: Add new Amber
Lake PCI ID"), including commit c1c8f6fa731b ("drm/i915:
Redefine some Whiskey Lake SKUs")
v2: Also sync intel_device_info.c (CI and Jose)
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
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One more CFL ID added to spec.
Align with kernel commit d0e062ebb3a4 ("drm/i915/cfl:
Add a new CFL PCI ID.")
v2: Fixed commit subject per Petri request.
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Petri Latvala <petri.latvala@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
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I just copied the Kernel file into the IGT repository and updated
lib/intel_device_info.c.
Changes:
- b9be78531d27 - drm/i915/whl: Introducing Whiskey Lake platform
- e364672477a1 - drm/i915/aml: Introducing Amber Lake platform
v2:
Ops, I forgot to add lib/intel_device_info.c changes.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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I just copied the Kernel file into the IGT repository.
New IDs:
- KBL GT2 sku from 672e314b21dc ("drm/i915/kbl: Add KBL GT2 sku")
- ICL IDs from d55cb4fa2cf0 ("drm/i915/icl: Add the ICL PCI IDs")
Cc: Matt Atwood <matthew.s.atwood@intel.com>
Acked-by: Antonio Argenziano <antonio.argenziano@intel.com>
Reviewed-by: Jose Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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Pure copy of kernel's i915_pciid.h in order to keep in
sync with kernel commit '3f43031b1693 ("drm/i915/cnl:
Add Cannonlake PCI IDs for another SKU.")'
and commit 'e3890d05b342 ("drm/i915/cnl: Sync PCI ID with Spec.")'
Cc: James Ausmus <james.ausmus@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Petri Latvala <petri.latvala@intel.com>
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Synchronize with kernel header as of
c99d7832dcd7 ("drm/i915/cfl: Adding more Coffee Lake PCI IDs.")
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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This copies include/drm/i915_pciids.h from kernel as of drm-tip:
drm-tip: 2017y-12m-08d-21h-06m-35s UTC + patch adding INTEL_CFL_IDS that
was missing there[1]. The goal is to keep track of the PCI IDs in a
single place (kernel).
Right now a simple copy is done to catch up with latest changes there,
although in future it could be more sofisticated pointing the build
system to the external header.
[1] https://patchwork.freedesktop.org/patch/192410/
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
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In sync with 41693fd52373 ("drm/i915/kbl: Change a KBL pci id
to GT2 from GT1.5")
"See Mesa commit 9c588ff"
v2: s/DT/Mobile
Cc: Anuj Phogat <anuj.phogat@gmail.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
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No functional change.
When CNL patches got rebased on top of cfl
the ids ended up in the middle of CFL ids. So let's
clean-up this mess a bit.
Also remove a spurious line.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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By the Spec all CNL Y skus are 2+2, i.e. GT2.
This is a copy of merged i915's
commit 95578277cbdb ("drm/i915/cnl: Add Cannonlake PCI IDs for Y-skus.")
v2: Based on Anusha's kernel clean-up.
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Clinton Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com>
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Platform enabling and its power-on are organized in different
skus (U x Y x S x H, etc). So instead of organizing it in
GT1 x GT2 x GT3 let's also use the platform sku.
This is also the new Spec style what makes the review much
more easy and straightforward.
This is a copy of merged i915's
commit e918d79a5d0a ("drm/i915/cnl: Add Cannonlake PCI IDs for U-skus.")
v2: Based on Anusha's kernel clean-up.
v3: Add kernel commit id for reference.
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Clinton Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com>
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Follow the spec and add ID for U SKU
v2: Update IDs in accordance to the kernel commit:
d29fe702c9cb682df99146d24d06e5455f043101 (Chris)
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Clint Taylor <clinton.a.taylor@intel.com>
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Follow the spec and add the ID for H SKU in
CFL.
v2: Update IDs following kernel commit:
ccfd13215fd25a0e8c28221f3acc0dcaec11cd15 (Chris)
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Clint Taylor <clinton.a.taylor@intel.com>
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Just following the spec and adding these extra IDs.
v2: update IDs following the kernel commit:
b056f8f3d6b900e8afd19f312719160346d263b4 (Chris)
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Clint Taylor <clinton.a.taylor@intel.com>
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Sync to
commit 77a9e13b5a3c9c0cbd9e672e55970e7358a1a482
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date: Mon Mar 13 11:26:09 2017 +0000
drm/i915: Add i810/i815 pci-ids for completeness
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Copy the include/drm/i915_pciids.h file from following kernel commit,
which includes Geminilake PCI IDs.
commit 8363e3c3947d0e22955f94a6a87e4f17ce5087b4
Author: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Date: Thu Nov 10 17:23:08 2016 +0200
drm/i915/glk: Add Geminilake PCI IDs
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Petri Latvala <petri.latvala@intel.com>
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Several years ago we made the plan of only having one canonical source
for i915_pciids.h, the kernel and everyone importing their definitions
from that. For consistency, we style the intel_device_info after the
kernel, most notably using a generation mask and a per-codename bitfield.
This first step converts looking up the generation for a devid tree from
a massive if(devid)-chain to a (cached) table lookup.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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This is a pure copy from the central location at
kernel/include/drm/i915_pciids.h
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