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While the Sandybridge PRM doesn't have any documentation on the GPU's
performance counters, a lot of information can be gleaned from the older
Ironlake PRM. Oddly, none of the information documented there actually
appears to apply to Ironlake. However, it apparently works just great
on Sandybridge.
Since this information has all been publicly available on the internet
for around three years, we can use it.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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We want to support this tool on more platforms. This lays the
groundwork for making that possible.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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This reads the GPU's performance counters via MI_REPORT_PERF_COUNT and
prints them in a top-style interface. While it can be useful in and of
itself, it also documents the performance counters and lets us verify
that they're working.
Currently, it only supports Ironlake.
v2 [Ken]: Rebase on master and fix compilation failures; make it abort
on non-Ironlake platforms to avoid GPU hangs; rename from 'chaps' to
intel_perf_counters since that acronym isn't used any longer; write the
above commit message.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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I've checked the value of these registers many many many times during
development.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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It was previously printing ironlake_debug_regs and haswell_debug_regs.
Since ironlake_debug_regs contains a lot of registers that don't exist
on Haswell, running intel_reg_dumper on Haswell caused "unclaimed
register" messages. Now I've copied the existing registers from
ironlake_debug_regs to haswell_debug_regs, so we won't print the
registers that don't exist anymore.
Also removed DP_TP_STATUS_A since it doesn't exist.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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autoconf can be configured to not generate a config.h but to give the
defines with command line arguments instead. In this case, there's no
config.h to include.
To work in both cases autoconf adds a HAVE_CONFIG_H define on the command
line to signal there's a config.h to include.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
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Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
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A few changes
- Put CPPFLAGS in AM_CPPFLAGS instead of a per-target CFLAGS var;
- Use _LIBS/_CFLAGS from pkg-config instead of hard-coded values;
- List non-generated scripts in dist_bin_SCRIPTS;
- Add chipset.py to the run that implicitly generates it, which fixes
distcheck.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
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This is useful if you run out of the quick_dump directory.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
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It may sometimes be undesirable to build or install the quick dumper.
This was requested by Damien.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
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Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
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Make a register access library with sample to do register reads
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
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This isn't strictly necessary it would have been easy enough to simply
convert intel_chipset.h but this should be nice prep work for directly
doing MMIO. It also serves as a nice review point.
It's demonstrated with an autodetect function in the script. That
autodetect has a hardcoded path that shouldn't be there, but it will go
away in the next patch when we can properly link in libpciaccess.
Thanks to Matt for helping whip the automake stuff into shape.
v2: Switch to $(top_srcdir)
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
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This patch includes a patch from Jesse which removed a bunch of VLV
registers which were useless in my original RFC.
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
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Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
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Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
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This is the base tool for quick dump. At it's heart, quick dump is
simply a basic text parsing thingie which plugs into intel-gpu-tools to
do something similar to intel_reg_dumper.
The format for the register definition files is very open, so it's just
something simple for now.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
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Vincent sent me a patch which I think didn't go far enough.
Honestly, I don't even know what this tool does.
Reported-by: Cheah, Vincent Beng Keat <vincent.beng.keat.cheah@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
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Whoops, someone added UTS_RELEASE with no newline before PCI ID which
upsets our naive parser.
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cppcheck reported:
[tools/intel_infoframes.c:836]: (error) Width 31 given in format string
(no. 1) is larger than destination buffer 'option[16]',
use %15s to prevent overflowing it.
Signed-off-by: Thomas Jarosch <thomas.jarosch@intra2net.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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checking if file has been generated and output a template for a good bug report
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needed by other igt tools that are collecting more usefull information.
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A function to make it easy to collect any file or directory needed later.
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Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Signed-off-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Signed-off-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Those infoframes are programmed when using stereo 3D modes.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Now that we can dump registers giving a partial name, adding more
information about the dumped registers seems useful.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Let people give just a part of the register name. Handy when not
remembering the exact name or if the register is defined with a
different name than the one in the spec being looked at.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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One can now give an address instead of a register name to decode a
single register.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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From time to time, one would like to decode a register value that have
been captured at a certain point in time (and say printed out with a
printk). intel_reg_dumper has all the knowledge to do that and this
patch adds a way to ask it to decode a value.
Example usage:
$ ./tools/intel_reg_dumper PCH_PP_CONTROL 0xabcd0002
PCH_PP_CONTROL: 0xabcd0002 (blacklight disabled, power...
v2: friendlier invocation (Chris Wilson)
v3: remove unecessary casts and use strcasecmp (Jani Nikula)
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
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Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
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Rather than use the common mmio segment which will be in future
restricted to just the registers and so exclude the GTT portion on all
architectures, explicitly mmap the GTT ourselves. Repeat this mmapping
with a couple of flags until we matching the existing kernel mapping.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Alan typo'ed it, I've failed to notice :(
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Solaris <sys/types.h> already has #define NOPID (pid_t)(-1)
Signed-off-by: Alan Coopersmith <alan.coopersmith@oracle.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
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Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
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In Valleyview the DPLL and lane control registers are accessible only
through side band fabric called DPIO. Added two tools to read and write
registers residing in this space.
v2: Moved the core read/write functions to lib/intel_dpio.c based on
Ben's feedback
Signed-off-by: Vijay Purushothaman <vijay.a.purushothaman@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Add Haswell audio registers definition and dump support.
Signed-off-by: Wang Xingchao <xingchao.wang@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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there're three Ports B/C/D used for selection by each transcoder A/B/C.
Signed-off-by: Wang Xingchao <xingchao.wang@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Not just a copy of pipe B. Meh.
Also kill a few redudant #define for pipe B - they match pipe A.
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Also reorder the pipe B regs a bit to be consisten with pipe A.
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We need to hold forcewake lock in order to be able to read GT registers.
Otherwise, when the GPU is in RC6 mode, we'll read all zeros.
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
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Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
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