diff options
author | Michael Brandt <Michael.Brandt@stericsson.com> | 2010-01-13 17:34:25 +0100 |
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committer | Michael Brandt <Michael.Brandt@stericsson.com> | 2010-01-13 17:34:25 +0100 |
commit | c8f05f17eb440b3ef88d9417bf02797475583737 (patch) | |
tree | 81e1bf25dd75b1bad7ba738dd15eb76d882912ea /cpu/mpc85xx/cpu_init.c | |
parent | 074f516bda136e5464499fc63a854d8469f8e9fb (diff) | |
parent | 2ff6922280025c1315c53fa2eb4ab33f0c9591de (diff) |
Merge branch 'master' of http://git.denx.de/u-boot
Diffstat (limited to 'cpu/mpc85xx/cpu_init.c')
-rw-r--r-- | cpu/mpc85xx/cpu_init.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/cpu/mpc85xx/cpu_init.c b/cpu/mpc85xx/cpu_init.c index 0041a60df..e0126d331 100644 --- a/cpu/mpc85xx/cpu_init.c +++ b/cpu/mpc85xx/cpu_init.c @@ -246,6 +246,7 @@ void cpu_init_f (void) #ifdef CONFIG_FSL_CORENET corenet_tb_init(); #endif + init_used_tlb_cams(); } @@ -357,6 +358,11 @@ int cpu_init_r(void) while (mfspr(SPRN_L2CSR0) & (L2CSR0_L2FI|L2CSR0_L2LFC)) ; +#ifdef CONFIG_SYS_CACHE_STASHING + /* set stash id to (coreID) * 2 + 32 + L2 (1) */ + mtspr(SPRN_L2CSR1, (32 + 1)); +#endif + /* enable the cache */ mtspr(SPRN_L2CSR0, CONFIG_SYS_INIT_L2CSR0); |