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path: root/drivers/net/ns8382x.c
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Diffstat (limited to 'drivers/net/ns8382x.c')
-rw-r--r--drivers/net/ns8382x.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/net/ns8382x.c b/drivers/net/ns8382x.c
index bb5843815..198f73dee 100644
--- a/drivers/net/ns8382x.c
+++ b/drivers/net/ns8382x.c
@@ -53,6 +53,7 @@
#include <common.h>
#include <malloc.h>
#include <net.h>
+#include <netdev.h>
#include <asm/io.h>
#include <pci.h>
@@ -444,7 +445,7 @@ ns8382x_initialize(bd_t * bis)
Read and write MII registers using software-generated serial MDIO
protocol. See the MII specifications or DP83840A data sheet for details.
- The maximum data clock rate is 2.5 Mhz. To meet minimum timing we
+ The maximum data clock rate is 2.5 MHz. To meet minimum timing we
must flush writes to the PCI bus with a PCI read. */
#define mdio_delay(mdio_addr) INL(dev, mdio_addr)