summaryrefslogtreecommitdiff
path: root/cpu/arm926ejs/at91
AgeCommit message (Collapse)Author
2009-12-05Generic udelay() with watchdog supportIngo van Lil
According to the PPC reference implementation the udelay() function is responsible for resetting the watchdog timer as frequently as needed. Most other architectures do not meet that requirement, so long-running operations might result in a watchdog reset. This patch adds a generic udelay() function which takes care of resetting the watchdog before calling an architecture-specific __udelay(). Signed-off-by: Ingo van Lil <inguin@gmx.de>
2009-10-13Add support for Eukrea CPU9260/CPU9G20 SBCTom Rix
these boards are built around Atmel's AT91SAM9260/9G20 and have up to 64MB of NOR flash, up to 128MB of SDRAM, up to 2GB of NAND and include a 10/100 Ethernet PHY in RMII mode. Signed-off-by: Eric Benard <eric@eukrea.com> Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2009-09-01Add support for the Calao SBC35-A9G20 boardAlbin Tonnerre
The Calao SBC35-A9G20 board is manufactured and sold by Calao Systems <http://www.calao-systems.com>. It is built around an AT91SAM9G20 ARM SoC running at 400MHz. It features an Ethernet port, an SPI RTC backed by an onboard battery , an SD/MMC slot, a CompactFlash slot, 64Mo of SDRAM, 256Mo of NAND flash, two USB host ports, and an USB device port. More informations can be found at <http://www.calao-systems.com/articles.php?lng=en&pg=5936> Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
2009-08-01Add AT91SAM9260 to at91's lowlevel_init.SEric Benard
Needed for AT91SAM9260 NOR Boot on Eukrea's CPU9260. Signed-off-by: Eric Benard <eric@eukrea.com>
2009-07-12at91: Introduction of at91sam9g10 SOC.Sedji Gaouaou
AT91sam9g10 is an ARM 926ej-s SOC. It is an evolution of the at91sam9261 with a faster clock speed: 266/133MHz. Signed-off-by: Sedji Gaouaou <sedji.gaouaou@atmel.com>
2009-07-12at91: Introduction of at91sam9g45 SOC.Sedji Gaouaou
AT91sam9g45 series is an ARM 926ej-s SOC family clocked at 400/133MHz. It embeds USB high speed host and device, LCD, DDR2 RAM, and a full set of peripherals. The first board that embeds at91sam9g45 chip is the AT91SAM9G45-EKES. On the board you can find 2 USART, USB high speed, a 480*272 LG lcd, ethernet, gpio/joystick/buttons. Signed-off-by: Sedji Gaouaou <sedji.gaouaou@atmel.com>
2009-07-06at91: Add CAN init functionDaniel Gorsulowski
To enable CAN init, CONFIG_CAN has to be defined in the board config file and at91_can_hw_init() has to be called in the board specific code. CAN is available on AT91SAM9263 and AT91CAP9 SoC. Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
2009-06-21at91: unify nor boot supportJean-Christophe PLAGNIOL-VILLARD
the lowlevel init sequence is the same so unify it Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-12at91: move cpu info print to cpuJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-12at91: extract reset from timerJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-12arm: unify linker scriptJean-Christophe PLAGNIOL-VILLARD
all arm boards except a few use the same cpu linker script so move it to cpu/$(CPU) that could be overwrite in following order SOC BOARD via the corresponding config.mk Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-12afeb9260: fix macb device initJean-Christophe PLAGNIOL-VILLARD
uses PA10, PA11 for ETX2 and ETX3. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-12at91: regroup IP hw init in one file per socJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-10at91/cpu.c: add missing Copyright & GPL headerJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-05-15Fix e-mail address of Gary Jennejohn.Detlev Zundel
Signed-off-by: Detlev Zundel <dzu@denx.de>
2009-05-13AFEB9260 network fixSergey Lapin
AFEB9260 uses PA10, PA11 for ETX2 and ETX3. Also, due to extarnal pull-up on IRQ line, Micrel PHY ID is 1 after reset sequence, not 0. Signed-off-by: Sergey Lapin <slapin@ossfans.org>
2009-05-01at91: remove lowlevel_init.SJean-Christophe PLAGNIOL-VILLARD
lowlevel_init.S is not used any more so remove it. As consequence, we also don't have to generate u-boot.lds but can use a static version as before. This also fixes the out-of-tree build problem introduced with commit f0a2c7b4 "at91: add support for the PM9263 board" Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-05-01Update CHANGELOG; minor coding style cleanup.Wolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-04-29at91: fixed plla calc when no USB support is activeDaniel Gorsulowski
Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-04-16at91sam9/at91cap: fix CONFIG_SYS_HZ to 1000Jean-Christophe PLAGNIOL-VILLARD
The timer has been rewrote with a precision at ~0,18% Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Tested-by: Sergey Lapin <slapin@ossfans.org> Tested-by: Eric BENARD <ebenard@free.fr>
2009-04-16at91: add support for the PM9263 board of Ronetix GmbHIlko Iliev
The PM9263 board is based on the AT91SAM9263-EK board. Here is the page on Ronetix website: http://www.ronetix.at/starter_kit_9263.html Signed-off-by: Ilko Iliev <iliev@ronetix.at> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-04-16at91sam9/at91cap: improve clock frameworkJean-Christophe PLAGNIOL-VILLARD
calculate dynamically the clock rate and pllb setting for usb Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-04-04at91: move dataflash spi driver to drivers/spiJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-04-04at91: move usb driver to drivers/usbJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-04-04at91: rename DATAFLASH_MMC_SELECT to CONFIG_DATAFLASH_MMC_SELECTJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-04-04at91sam9/at91cap: spi init add hardware chip select supportJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-22at91: Support for the at91sam9g20 : Atmel 400Mhz ARM 926ej-s SOC.Nicolas Ferre
AT91sam9g20 is an evolution of the at91sam9260 with a faster clock speed. The AT91SAM9G20-EK board is an updated revision of the AT91SAM9260-EK board. It is essentially the same, with a few minor differences. Here is the chip page on Atmel website: http://www.atmel.com/dyn/products/product_card.asp?part_id=4337 Signed-off-by: Justin Waters <justin.waters@timesys.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-22at91sam9/at91cap: move common macb initialisation to cpuJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-22at91sam9/at91cap: move common usb host initialisation to cpuJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-22at91sam9/at91cap: move common led management to cpuJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-22at91sam9/at91cap: move common spi initialisation to cpuJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-22at91sam9/at91cap: move common serial initialisation to cpuJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-20Fix all linker script to handle all rodata sectionsTrent Piepho
A recent gcc added a new unaligned rodata section called '.rodata.str1.1', which needs to be added the the linker script. Instead of just adding this one section, we use a wildcard ".rodata*" to get all rodata linker section gcc has now and might add in the future. However, '*(.rodata*)' by itself will result in sub-optimal section ordering. The sections will be sorted by object file, which causes extra padding between the unaligned rodata.str.1.1 of one object file and the aligned rodata of the next object file. This is easy to fix by using the SORT_BY_ALIGNMENT command. This patch has not be tested one most of the boards modified. Some boards have a linker script that looks something like this: *(.text) . = ALIGN(16); *(.rodata) *(.rodata.str1.4) *(.eh_frame) I change this to: *(.text) . = ALIGN(16); *(.eh_frame) *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) This means the start of rodata will no longer be 16 bytes aligned. However, the boundary between text and rodata/eh_frame is still aligned to 16 bytes, which is what I think the real purpose of the ALIGN call is. Signed-off-by: Trent Piepho <xyzzy@speakeasy.org>
2008-12-14Fix new found CFG_Jean-Christophe PLAGNIOL-VILLARD
Also fix some minor typos. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-12-06Remove redundant armv4 flag from arm926ejs compile flagsRemy Bohmer
Currently the arm926ejs tree has the armv4 option set during compilation. This flag does not belong here because a arm926 CPU is always a armv5 CPU. Signed-off-by: Remy Bohmer <linux@bohmer.net>
2008-11-21AT91: Enable PLLB for USBStelian Pop
At least some (old ?) versions of the AT91Bootstrap do not set up the PLLB correctly to 48 MHz in order to make USB host function correctly. This patch sets up the PLLB to the same values Linux uses, and makes USB work ok on the following CPUs: - AT91CAP9 - AT91SAM9260 - AT91SAM9263 This patch also defines CONFIG_USB_STORAGE and CONFIG_CMD_FAT for all the relevant AT91CAP9/AT91SAM9 atmel boards. Signed-off-by: Stelian Pop <stelian@popies.net> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-11-18Align end of bss by 4 bytesSelvamuthukumar
Most of the bss initialization loop increments 4 bytes at a time. And the loop end is checked for an 'equal' condition. Make the bss end address aligned by 4, so that the loop will end as expected. Signed-off-by: Selvamuthukumar <selva.muthukumar@e-coninfotech.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-10-18rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-02Moved initialization of Ethernet controllers on Atmel AT91 to board_eth_init()Ben Warren
Removed at91sam9_eth_initialize() from net/eth.c Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-08-12at91: move arch-at91sam9 to arch-at91Jean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-06-10 07:05:51 +0000