diff options
| author | Ben Skeggs <bskeggs@redhat.com> | 2013-12-02 12:00:33 +1000 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2014-01-23 13:38:57 +1000 |
| commit | ea8b4a380d46795610d17afcdec1067b0ff5f1c3 (patch) | |
| tree | 8bc0e17501e1864ee098814d0e2334840feb51e0 /drivers/gpu/drm/nouveau | |
| parent | 971372eac18294ad31c137503881426b8094550b (diff) | |
drm/nve0/fb/gddr5: found LP3 setting
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau')
| -rw-r--r-- | drivers/gpu/drm/nouveau/core/subdev/fb/gddr5.c | 5 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/core/subdev/fb/ramnve0.c | 10 |
2 files changed, 8 insertions, 7 deletions
diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/gddr5.c b/drivers/gpu/drm/nouveau/core/subdev/fb/gddr5.c index 1427ae3828d1..f2bbe9e98bda 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/fb/gddr5.c +++ b/drivers/gpu/drm/nouveau/core/subdev/fb/gddr5.c @@ -29,7 +29,7 @@ int nouveau_gddr5_calc(struct nouveau_ram *ram, bool nuts) { struct nouveau_bios *bios = nouveau_bios(ram); - int pd, lf, xd, vh, vr, vo; + int pd, lf, xd, vh, vr, vo, l3; int WL, CL, WR, at[2], dt, ds; int rq = ram->freq < 1000000; /* XXX */ @@ -41,6 +41,7 @@ nouveau_gddr5_calc(struct nouveau_ram *ram, bool nuts) vh = (nv_ro08(bios, ram->ramcfg.data + 0x02) & 0x10) >> 4; vr = (nv_ro08(bios, ram->ramcfg.data + 0x02) & 0x04) >> 2; vo = nv_ro08(bios, ram->ramcfg.data + 0x06) & 0xff; + l3 = !(nv_ro08(bios, ram->ramcfg.data + 0x07) & 0x02); break; default: return -ENOSYS; @@ -88,8 +89,8 @@ nouveau_gddr5_calc(struct nouveau_ram *ram, bool nuts) ram->mr[3] &= ~0x020; ram->mr[3] |= (rq & 0x01) << 5; - /*XXX: LP3, where's the bit? Let's hardcode to off for now */ ram->mr[5] &= ~0x004; + ram->mr[5] |= (l3 << 2); if (!vo) vo = (ram->mr[6] & 0xff0) >> 4; diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/ramnve0.c b/drivers/gpu/drm/nouveau/core/subdev/fb/ramnve0.c index e0d63af19107..6682ec049900 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/fb/ramnve0.c +++ b/drivers/gpu/drm/nouveau/core/subdev/fb/ramnve0.c @@ -638,16 +638,16 @@ nve0_ram_calc_gddr5(struct nouveau_fb *pfb, u32 freq) data = 0xa40e0000; } nve0_ram_train(fuc, 0xbc0f0000, data); - ram_nsec(fuc, 1000); + if (1) /* XXX: not always? */ + ram_nsec(fuc, 1000); if (ram->mode == 2) { /*XXX*/ ram_mask(fuc, 0x10f800, 0x00000004, 0x00000004); } - /* MR5: (re)enable LP3 if necessary - * XXX: need to find the switch, keeping off for now - */ - ram_mask(fuc, mr[5], 0xfff, ram->base.mr[5]); + /* LP3 */ + if (ram_mask(fuc, mr[5], 0x004, ram->base.mr[5]) != ram->base.mr[5]) + ram_nsec(fuc, 1000); if (ram->mode != 2) { ram_mask(fuc, 0x10f830, 0x01000000, 0x01000000); |