1 files changed, 131 insertions, 177 deletions

diff --git a/drivers/gpu/pvr/omap4/sysutils_linux.c b/drivers/gpu/pvr/omap4/sysutils_linux.c
index 52ae877f05e..f7c3ac11424 100644
--- a/drivers/gpu/pvr/omap4/sysutils_linux.c
+++ b/drivers/gpu/pvr/omap4/sysutils_linux.c
@@ -41,16 +41,6 @@
 #include <linux/platform_device.h>
 #include <linux/pm_runtime.h>
 
-#if !defined(PVR_LINUX_USING_WORKQUEUES)
-#error "PVR_LINUX_USING_WORKQUEUES must be defined"
-#endif
-
-#if ((defined(DEBUG) || defined(TIMING)) && \
-    (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,34))) && \
-    !defined(PVR_NO_OMAP_TIMER)
-#define	PVR_OMAP4_TIMING_PRCM
-#endif
-
 #define	ONE_MHZ	1000000
 #define	HZ_TO_MHZ(m) ((m) / ONE_MHZ)
 
@@ -60,7 +50,7 @@
 #define SGX_PARENT_CLOCK "core_ck"
 #endif
 
-#if defined(LDM_PLATFORM) && !defined(SUPPORT_DRI_DRM)
+#if defined(LDM_PLATFORM) && !defined(PVR_DRI_DRM_NOT_PCI)
 extern struct platform_device *gpsPVRLDMDev;
 #endif
 
@@ -134,17 +124,9 @@ IMG_VOID SysGetSGXTimingInformation(SGX_TIMING_INFORMATION *psTimingInfo)
 {
 	IMG_UINT32 rate;
 
-#if defined(NO_HARDWARE)
 	rate = SYS_SGX_CLOCK_SPEED;
-#else
+#if !defined(NO_HARDWARE)
 	PVR_ASSERT(atomic_read(&gpsSysSpecificData->sSGXClocksEnabled) != 0);
-
-#if defined(OMAP4_PRCM_ENABLE)
-	rate = clk_get_rate(gpsSysSpecificData->psSGX_FCK);
-#else
-	rate = SYS_SGX_CLOCK_SPEED;
-#endif
-	PVR_ASSERT(rate != 0);
 #endif
 	psTimingInfo->ui32CoreClockSpeed = rate;
 	psTimingInfo->ui32HWRecoveryFreq = scale_prop_to_SGX_clock(SYS_SGX_HWRECOVERY_TIMEOUT_FREQ, rate);
@@ -161,11 +143,6 @@ PVRSRV_ERROR EnableSGXClocks(SYS_DATA *psSysData)
 {
 #if !defined(NO_HARDWARE)
 	SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData;
-#if defined(OMAP4_PRCM_ENABLE)
-	long lNewRate;
-	long lRate;
-	IMG_INT res;
-#endif
 
 	
 	if (atomic_read(&psSysSpecData->sSGXClocksEnabled) != 0)
@@ -175,61 +152,18 @@ PVRSRV_ERROR EnableSGXClocks(SYS_DATA *psSysData)
 
 	PVR_DPF((PVR_DBG_MESSAGE, "EnableSGXClocks: Enabling SGX Clocks"));
 
-#if defined(LDM_PLATFORM) && !defined(SUPPORT_DRI_DRM)
-	pm_runtime_get_sync(&gpsPVRLDMDev->dev);
-#endif
-
-#if defined(OMAP4_PRCM_ENABLE)
-
-#if defined(DEBUG)
-	{
-		IMG_UINT32 rate = clk_get_rate(psSysSpecData->psMPU_CK);
-		PVR_DPF((PVR_DBG_MESSAGE, "EnableSGXClocks: CPU Clock is %dMhz", HZ_TO_MHZ(rate)));
-	}
-#endif
-
-	res = clk_enable(psSysSpecData->psSGX_FCK);
-	if (res < 0)
+#if defined(LDM_PLATFORM) && !defined(PVR_DRI_DRM_NOT_PCI)
 	{
-		PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: Couldn't enable SGX functional clock (%d)", res));
-		return PVRSRV_ERROR_UNABLE_TO_ENABLE_CLOCK;
-	}
 
-	res = clk_enable(psSysSpecData->psSGX_ICK);
-	if (res < 0)
-	{
-		PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: Couldn't enable SGX interface clock (%d)", res));
-
-		clk_disable(psSysSpecData->psSGX_FCK);
-		return PVRSRV_ERROR_UNABLE_TO_ENABLE_CLOCK;
-	}
-
-	lNewRate = clk_round_rate(psSysSpecData->psSGX_FCK, SYS_SGX_CLOCK_SPEED + ONE_MHZ);
-	if (lNewRate <= 0)
-	{
-		PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: Couldn't round SGX functional clock rate"));
-		return PVRSRV_ERROR_UNABLE_TO_ROUND_CLOCK_RATE;
-	}
-
-	
-	lRate = clk_get_rate(psSysSpecData->psSGX_FCK);
-	if (lRate != lNewRate)
-	{
-		res = clk_set_rate(psSysSpecData->psSGX_FCK, lNewRate);
+		int res = pm_runtime_get_sync(&gpsPVRLDMDev->dev);
 		if (res < 0)
 		{
-			PVR_DPF((PVR_DBG_WARNING, "EnableSGXClocks: Couldn't set SGX functional clock rate (%d)", res));
+			PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: pm_runtime_get_sync failed (%d)", -res));
+			return PVRSRV_ERROR_UNABLE_TO_ENABLE_CLOCK;
 		}
 	}
-
-#if defined(DEBUG)
-	{
-		IMG_UINT32 rate = clk_get_rate(psSysSpecData->psSGX_FCK);
-		PVR_DPF((PVR_DBG_MESSAGE, "EnableSGXClocks: SGX Functional Clock is %dMhz", HZ_TO_MHZ(rate)));
-	}
 #endif
-
-#endif 
+	SysEnableSGXInterrupts(psSysData);
 
 	
 	atomic_set(&psSysSpecData->sSGXClocksEnabled, 1);
@@ -254,21 +188,17 @@ IMG_VOID DisableSGXClocks(SYS_DATA *psSysData)
 
 	PVR_DPF((PVR_DBG_MESSAGE, "DisableSGXClocks: Disabling SGX Clocks"));
 
-#if defined(LDM_PLATFORM) && !defined(SUPPORT_DRI_DRM)
-	pm_runtime_put_sync(&gpsPVRLDMDev->dev);
-#endif
+	SysDisableSGXInterrupts(psSysData);
 
-#if defined(OMAP4_PRCM_ENABLE)
-	if (psSysSpecData->psSGX_ICK)
+#if defined(LDM_PLATFORM) && !defined(PVR_DRI_DRM_NOT_PCI)
 	{
-		clk_disable(psSysSpecData->psSGX_ICK);
-	}
-
-	if (psSysSpecData->psSGX_FCK)
-	{
-		clk_disable(psSysSpecData->psSGX_FCK);
+		int res = pm_runtime_put_sync(&gpsPVRLDMDev->dev);
+		if (res < 0)
+		{
+			PVR_DPF((PVR_DBG_ERROR, "DisableSGXClocks: pm_runtime_put_sync failed (%d)", -res));
+		}
 	}
-#endif 
+#endif
 
 	
 	atomic_set(&psSysSpecData->sSGXClocksEnabled, 0);
@@ -278,86 +208,78 @@ IMG_VOID DisableSGXClocks(SYS_DATA *psSysData)
 #endif	
 }
 
-PVRSRV_ERROR EnableSystemClocks(SYS_DATA *psSysData)
+#if (defined(DEBUG) || defined(TIMING)) && !defined(PVR_NO_OMAP_TIMER)
+#if defined(PVR_OMAP_USE_DM_TIMER_API)
+#define	GPTIMER_TO_USE 11
+static PVRSRV_ERROR AcquireGPTimer(SYS_SPECIFIC_DATA *psSysSpecData)
 {
-	SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData;
-#if (defined(OMAP4_PRCM_ENABLE) || defined(PVR_OMAP4_TIMING_PRCM))
-	struct clk *psCLK;
-	IMG_INT res;
-#endif
-#if defined(PVR_OMAP4_TIMING_PRCM)
-	struct clk *sys_ck;
-	IMG_INT rate;
-#endif
-	PVRSRV_ERROR eError;
+	PVR_ASSERT(psSysSpecData->psGPTimer == NULL);
 
-#if (defined(DEBUG) || defined(TIMING)) && !defined(PVR_NO_OMAP_TIMER)
-	IMG_CPU_PHYADDR TimerRegPhysBase;
-	IMG_HANDLE hTimerEnable;
-	IMG_UINT32 *pui32TimerEnable;
-#endif	
 
-	PVR_TRACE(("EnableSystemClocks: Enabling System Clocks"));
+	psSysSpecData->psGPTimer = omap_dm_timer_request_specific(GPTIMER_TO_USE);
+	if (psSysSpecData->psGPTimer == NULL)
+	{
 
-	if (!psSysSpecData->bSysClocksOneTimeInit)
+		PVR_DPF((PVR_DBG_WARNING, "%s: omap_dm_timer_request_specific failed", __FUNCTION__));
+		return PVRSRV_ERROR_CLOCK_REQUEST_FAILED;
+	}
+
+
+	omap_dm_timer_set_source(psSysSpecData->psGPTimer, OMAP_TIMER_SRC_SYS_CLK);
+	omap_dm_timer_enable(psSysSpecData->psGPTimer);
+
+
+	omap_dm_timer_set_load_start(psSysSpecData->psGPTimer, 1, 0);
+
+	omap_dm_timer_start(psSysSpecData->psGPTimer);
+
+
+	psSysSpecData->sTimerRegPhysBase.uiAddr = SYS_OMAP4430_GP11TIMER_REGS_SYS_PHYS_BASE;
+
+	return PVRSRV_OK;
+}
+
+static void ReleaseGPTimer(SYS_SPECIFIC_DATA *psSysSpecData)
+{
+	if (psSysSpecData->psGPTimer != NULL)
 	{
-		mutex_init(&psSysSpecData->sPowerLock);
 
-		atomic_set(&psSysSpecData->sSGXClocksEnabled, 0);
+		(void) omap_dm_timer_stop(psSysSpecData->psGPTimer);
 
-#if defined(OMAP4_PRCM_ENABLE)
-		psCLK = clk_get(NULL, SGX_PARENT_CLOCK);
-		if (IS_ERR(psCLK))
-		{
-			PVR_DPF((PVR_DBG_ERROR, "EnableSsystemClocks: Couldn't get Core Clock"));
-			goto ExitError;
-		}
-		psSysSpecData->psCORE_CK = psCLK;
+		omap_dm_timer_disable(psSysSpecData->psGPTimer);
 
-		psCLK = clk_get(NULL, "sgx_fck");
-		if (IS_ERR(psCLK))
-		{
-			PVR_DPF((PVR_DBG_ERROR, "EnableSsystemClocks: Couldn't get SGX Functional Clock"));
-			goto ExitError;
-		}
-		psSysSpecData->psSGX_FCK = psCLK;
+		omap_dm_timer_free(psSysSpecData->psGPTimer);
 
-		psCLK = clk_get(NULL, "sgx_ick");
-		if (IS_ERR(psCLK))
-		{
-			PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't get SGX Interface Clock"));
-			goto ExitError;
-		}
-		psSysSpecData->psSGX_ICK = psCLK;
+		psSysSpecData->sTimerRegPhysBase.uiAddr = 0;
 
-#if defined(DEBUG)
-		psCLK = clk_get(NULL, "mpu_ck");
-		if (IS_ERR(psCLK))
-		{
-			PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't get MPU Clock"));
-			goto ExitError;
-		}
-		psSysSpecData->psMPU_CK = psCLK;
+		psSysSpecData->psGPTimer = NULL;
+	}
+
+}
+#else
+static PVRSRV_ERROR AcquireGPTimer(SYS_SPECIFIC_DATA *psSysSpecData)
+{
+#if defined(PVR_OMAP4_TIMING_PRCM)
+	struct clk *psCLK;
+	IMG_INT res;
+	struct clk *sys_ck;
+	IMG_INT rate;
 #endif
-		res = clk_set_parent(psSysSpecData->psSGX_FCK, psSysSpecData->psCORE_CK);
-		if (res < 0)
-		{
-			PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't set SGX parent clock (%d)", res));
-			goto ExitError;
-		}
-#endif 
+	PVRSRV_ERROR eError;
 
-		psSysSpecData->bSysClocksOneTimeInit = IMG_TRUE;
-	}
+	IMG_CPU_PHYADDR sTimerRegPhysBase;
+	IMG_HANDLE hTimerEnable;
+	IMG_UINT32 *pui32TimerEnable;
+
+	PVR_ASSERT(psSysSpecData->sTimerRegPhysBase.uiAddr == 0);
 
-#if (defined(DEBUG) || defined(TIMING)) && !defined(PVR_NO_OMAP_TIMER)
 #if defined(PVR_OMAP4_TIMING_PRCM)
 	
 	psCLK = clk_get(NULL, "gpt11_fck");
 	if (IS_ERR(psCLK))
 	{
 		PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't get GPTIMER11 functional clock"));
-		goto ExitUnRegisterConstraintNotifications;
+		goto ExitError;
 	}
 	psSysSpecData->psGPT11_FCK = psCLK;
 
@@ -365,7 +287,7 @@ PVRSRV_ERROR EnableSystemClocks(SYS_DATA *psSysData)
 	if (IS_ERR(psCLK))
 	{
 		PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't get GPTIMER11 interface clock"));
-		goto ExitUnRegisterConstraintNotifications;
+		goto ExitError;
 	}
 	psSysSpecData->psGPT11_ICK = psCLK;
 
@@ -373,7 +295,7 @@ PVRSRV_ERROR EnableSystemClocks(SYS_DATA *psSysData)
 	if (IS_ERR(sys_ck))
 	{
 		PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't get System clock"));
-		goto ExitUnRegisterConstraintNotifications;
+		goto ExitError;
 	}
 
 	if(clk_get_parent(psSysSpecData->psGPT11_FCK) != sys_ck)
@@ -383,7 +305,7 @@ PVRSRV_ERROR EnableSystemClocks(SYS_DATA *psSysData)
 		if (res < 0)
 		{
 			PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't set GPTIMER11 parent clock (%d)", res));
-		goto ExitUnRegisterConstraintNotifications;
+		goto ExitError;
 		}
 	}
 
@@ -394,7 +316,7 @@ PVRSRV_ERROR EnableSystemClocks(SYS_DATA *psSysData)
 	if (res < 0)
 	{
 		PVR_DPF((PVR_DBG_ERROR, "EnableSystemClocks: Couldn't enable GPTIMER11 functional clock (%d)", res));
-		goto ExitUnRegisterConstraintNotifications;
+		goto ExitError;
 	}
 
 	res = clk_enable(psSysSpecData->psGPT11_ICK);
@@ -406,8 +328,8 @@ PVRSRV_ERROR EnableSystemClocks(SYS_DATA *psSysData)
 #endif	
 
 	
-	TimerRegPhysBase.uiAddr = SYS_OMAP4430_GP11TIMER_TSICR_SYS_PHYS_BASE;
-	pui32TimerEnable = OSMapPhysToLin(TimerRegPhysBase,
+	sTimerRegPhysBase.uiAddr = SYS_OMAP4430_GP11TIMER_TSICR_SYS_PHYS_BASE;
+	pui32TimerEnable = OSMapPhysToLin(sTimerRegPhysBase,
                   4,
                   PVRSRV_HAP_KERNEL_ONLY|PVRSRV_HAP_UNCACHED,
                   &hTimerEnable);
@@ -432,8 +354,8 @@ PVRSRV_ERROR EnableSystemClocks(SYS_DATA *psSysData)
 		    hTimerEnable);
 
 	
-	TimerRegPhysBase.uiAddr = SYS_OMAP4430_GP11TIMER_ENABLE_SYS_PHYS_BASE;
-	pui32TimerEnable = OSMapPhysToLin(TimerRegPhysBase,
+	sTimerRegPhysBase.uiAddr = SYS_OMAP4430_GP11TIMER_ENABLE_SYS_PHYS_BASE;
+	pui32TimerEnable = OSMapPhysToLin(sTimerRegPhysBase,
                   4,
                   PVRSRV_HAP_KERNEL_ONLY|PVRSRV_HAP_UNCACHED,
                   &hTimerEnable);
@@ -452,48 +374,36 @@ PVRSRV_ERROR EnableSystemClocks(SYS_DATA *psSysData)
 		    PVRSRV_HAP_KERNEL_ONLY|PVRSRV_HAP_UNCACHED,
 		    hTimerEnable);
 
-#endif 
+	psSysSpecData->sTimerRegPhysBase = sTimerRegPhysBase;
 
 	eError = PVRSRV_OK;
+
 	goto Exit;
 
-#if (defined(DEBUG) || defined(TIMING)) && !defined(PVR_NO_OMAP_TIMER)
 ExitDisableGPT11ICK:
 #if defined(PVR_OMAP4_TIMING_PRCM)
 	clk_disable(psSysSpecData->psGPT11_ICK);
 ExitDisableGPT11FCK:
 	clk_disable(psSysSpecData->psGPT11_FCK);
-ExitUnRegisterConstraintNotifications:
-#endif	
-#endif	
-#if defined(OMAP4_PRCM_ENABLE)
 ExitError:
 #endif
-	eError = PVRSRV_ERROR_DISABLE_CLOCK_FAILURE;
+	eError = PVRSRV_ERROR_CLOCK_REQUEST_FAILED;
 Exit:
 	return eError;
 }
 
-IMG_VOID DisableSystemClocks(SYS_DATA *psSysData)
+static void ReleaseGPTimer(SYS_SPECIFIC_DATA *psSysSpecData)
 {
-#if (defined(DEBUG) || defined(TIMING)) && !defined(PVR_NO_OMAP_TIMER)
-#if defined(PVR_OMAP4_TIMING_PRCM)
-	SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData;
-#endif
-	IMG_CPU_PHYADDR TimerRegPhysBase;
 	IMG_HANDLE hTimerDisable;
 	IMG_UINT32 *pui32TimerDisable;
-#endif	
 
-	PVR_TRACE(("DisableSystemClocks: Disabling System Clocks"));
-
-	
-	DisableSGXClocks(psSysData);
+	if (psSysSpecData->sTimerRegPhysBase.uiAddr == 0)
+	{
+		return;
+	}
 
-#if (defined(DEBUG) || defined(TIMING)) && !defined(PVR_NO_OMAP_TIMER)
 	
-	TimerRegPhysBase.uiAddr = SYS_OMAP4430_GP11TIMER_ENABLE_SYS_PHYS_BASE;
-	pui32TimerDisable = OSMapPhysToLin(TimerRegPhysBase,
+	pui32TimerDisable = OSMapPhysToLin(psSysSpecData->sTimerRegPhysBase,
 				4,
 				PVRSRV_HAP_KERNEL_ONLY|PVRSRV_HAP_UNCACHED,
 				&hTimerDisable);
@@ -512,17 +422,61 @@ IMG_VOID DisableSystemClocks(SYS_DATA *psSysData)
 				hTimerDisable);
 	}
 
+	psSysSpecData->sTimerRegPhysBase.uiAddr = 0;
+
 #if defined(PVR_OMAP4_TIMING_PRCM)
 	clk_disable(psSysSpecData->psGPT11_ICK);
 
 	clk_disable(psSysSpecData->psGPT11_FCK);
 #endif	
+}
+#endif
+#else
+static PVRSRV_ERROR AcquireGPTimer(SYS_SPECIFIC_DATA *psSysSpecData)
+{
+	PVR_UNREFERENCED_PARAMETER(psSysSpecData);
+
+	return PVRSRV_OK;
+}
+static void ReleaseGPTimer(SYS_SPECIFIC_DATA *psSysSpecData)
+{
+	PVR_UNREFERENCED_PARAMETER(psSysSpecData);
+}
 #endif 
+
+PVRSRV_ERROR EnableSystemClocks(SYS_DATA *psSysData)
+{
+	SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData;
+
+	PVR_TRACE(("EnableSystemClocks: Enabling System Clocks"));
+
+	if (!psSysSpecData->bSysClocksOneTimeInit)
+	{
+		mutex_init(&psSysSpecData->sPowerLock);
+
+		atomic_set(&psSysSpecData->sSGXClocksEnabled, 0);
+
+		psSysSpecData->bSysClocksOneTimeInit = IMG_TRUE;
+	}
+
+	return AcquireGPTimer(psSysSpecData);
+}
+
+IMG_VOID DisableSystemClocks(SYS_DATA *psSysData)
+{
+	SYS_SPECIFIC_DATA *psSysSpecData = (SYS_SPECIFIC_DATA *) psSysData->pvSysSpecificData;
+
+	PVR_TRACE(("DisableSystemClocks: Disabling System Clocks"));
+
+
+	DisableSGXClocks(psSysData);
+
+	ReleaseGPTimer(psSysSpecData);
 }
 
 PVRSRV_ERROR SysPMRuntimeRegister(void)
 {
-#if defined(LDM_PLATFORM) && !defined(SUPPORT_DRI_DRM)
+#if defined(LDM_PLATFORM) && !defined(PVR_DRI_DRM_NOT_PCI)
 	pm_runtime_enable(&gpsPVRLDMDev->dev);
 #endif
 	return PVRSRV_OK;
@@ -530,7 +484,7 @@ PVRSRV_ERROR SysPMRuntimeRegister(void)
 
 PVRSRV_ERROR SysPMRuntimeUnregister(void)
 {
-#if defined(LDM_PLATFORM) && !defined(SUPPORT_DRI_DRM)
+#if defined(LDM_PLATFORM) && !defined(PVR_DRI_DRM_NOT_PCI)
 	pm_runtime_disable(&gpsPVRLDMDev->dev);
 #endif
 	return PVRSRV_OK;